DS80C390 Datasheet, PDF (30/58 Pages) Dallas Semiconductor – Dual CAN High-Speed Microprocessor

DS80C390
compared directly or via a mask register. A special set of arbitration registers dedicated to Message
center 15 allow added flexibility in filtering this location.
If desired, further arbitration can be performed by comparing the first two bytes of the data field in each
message against two 8-bit Media Arbitration register bytes. The MDME bit in the CAN Message Center
Format Registers (C0MxF.0 or C1MxF.0) either disables (MDME=0) arbitration, or enables (MDME=1)
arbitration using the Media ID Mask Registers 0-1.
If the 11-bit or 29-bit arbitration and the optional Media Byte arbitration are successful the message is
loaded into the respective message center. The Format Register also allows the microcontroller to
program each message center to function in a receive or transmit mode via the T/ R bit and to use from 0
to 8 data bytes within the data field of a message. Note that Message Center 15 can only be used in a
receive mode. To avoid a priority inversion the DS80C390 CAN processors are configured to reload the
transmit buffer with the message of the highest priority (lowest message center number) whenever an
arbitration is lost or an error condition occurs.
ARBITRATION/MASKING FEATURE SUMMARY Table 13
Test Name
Arbitration Registers
Mask Registers
Control bits and conditions
Standard 11-bit
arbitration (CAN 2.0A)
Message Center
Arbitration Registers 0-1
(Located in each Message
Center, MOVX memory)
Standard Global Mask
Registers 0-1
(Located in each CAN
Control/Status/Mask
Register bank, MOVX
memory)
EX/ ST =0
MEME=0: Mask register ignored. ID and
arbitration register must match exactly.
MEME=1: Only bits corresponding to 1 in mask
register are compared in ID and arbitration registers.
Extended 29-bit
arbitration (CAN 2.0B)
Message Center
Arbitration Registers 0-3
(Located in each Message
Center, MOVX memory)
Extended Global Mask
Registers 0-3
(Located in each CAN
Control/Status/Mask
Register bank, MOVX
memory)
EX/ ST =1
MEME=0: Mask register ignored. ID and
arbitration register must match exactly.
MEME=1: Only bits corresponding to 1 in mask
register are compared in ID and arbitration registers.
Media byte arbitration
Media Arbitration
Registers 0-3
(Located in each CAN
Control/Status/Mask
Register bank, MOVX
Media ID Mask Registers
0-1
(Located in each CAN
Control/Status/Mask
Register bank, MOVX
MDME=0: Media byte arbitration disabled.
MDME =1: Only bits corresponding to 1 in Media
ID mask register are compared between data bytes 1
and 2 and Media arbitration registers.
memory)
memory)
Message Center 15,
Standard 11-bit
arbitration (CAN 2.0A)
Message Center 15
Arbitration Registers 0-1
(Located in Message
Center 15, MOVX
memory)
Message Center 15 Mask
Registers 0-1
(Located in each CAN
Control/Status/Mask
Register bank, MOVX
memory)
EX/ ST =0
MEME=0: Mask register ignored. ID and
arbitration register must match exactly.
MEME=1: Message center 15 mask registers are
ANDed with Global Mask register. Only bits
corresponding to 1 in resulting value are compared
in ID and arbitration registers.
Message Center 15,
Extended 29-bit
arbitration (CAN 2.0B)
Message Center 15
Arbitration Registers 0-3
(Located in Message
Center 15, MOVX
memory)
Message Center 15 Mask
Registers 0-3
(Located in each CAN
Control/Status/Mask
Register bank, MOVX
memory)
EX/ ST =1
MEME=0: Mask register ignored. ID and
arbitration register must match exactly.
MEME=1: Message center 15 mask registers are
ANDed with Global Mask register. Only bits
corresponding to 1 in resulting value are compared
in ID and arbitration registers.
MESSAGE BUFFERING/OVERWRITE
If a message center is configured for reception (T/ R =0) and the previous message has not been read
(DTUP=1), then the disposition of an incoming message to that message center will be controlled by the
WTOE bit (located in CAN Arbitration Register 3 of each message center). When WTOE=0, the
incoming message will be discarded and the current message untouched.
30 of 58
110199