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DS80C390 Datasheet, PDF (45/58 Pages) Dallas Semiconductor – Dual CAN High-Speed Microprocessor | |||
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DS80C390
MOVX CHARACTERISTICS (Non-multiplexed address/data bus)
PARAMETER
SYMBOL MIN
MAX
UNITS STRETCH
VALUES
Input Instruction Float after
PSEN
PSEN High to Data Address,
tPXIZ
tPHAV
0.5 tMCS -5
0.75 tMCS -5
2.75 tMCS -10
0.25 tMCS -5
CST (MD2:0)
CST =0
1⤠CST ⤠3
ns 4 ⤠CST ⤠7
ns
Port 4 CE, Port 5 PCE Valid
RD Pulse Width
tRLRH
0.5 tMCS -5
ns
CST =0
CST â¢tMCS -10
1 ⤠CST ⤠7
WR Pulse Width
tWLWH 0.5 tMCS -5
ns
CST =0
RD Low to Valid Data In
tRLDV
CST â¢tMCS -10
0.5 tMCS -20
1 ⤠CST ⤠7
ns
CST = 0
CST â¢tMCS -20
1 ⤠CST ⤠7
Data Hold after Read
Data Float after Read
tRHDX
0
tRHDZ
0.5 tMCS -5
0.75tMCS -5
1.75 tMCS -5
ns
ns
CST = 0
1⤠CST ⤠3
4 ⤠CST ⤠7
PSEN High to WR Low
tPHWL
0.5 tMCS -5
ns
CST = 0
0.75tMCS -5
2.75 tMCS -5
1⤠CST ⤠3
4 ⤠CST ⤠7
Data Float after Read
tPHRL
Port 1 Address, Port 4 CE, Port
5 PCE to Valid Data In
tAVDV1
0.5 tMCS -5
ns
CST = 0
0.75tMCS -5
1⤠CST ⤠3
2.75 tMCS -5
4 ⤠CST ⤠7
0.75 tMCS -20
ns
CST = 0
(CST+0. 5)â¢tMCS -20
1⤠CST ⤠3
(CST+2.5)â¢tMCS -20
4 ⤠CST ⤠7
Port 2, 4 Address to Valid Data
In
Port 0 Address, Port 4 CE, Port
5 PCE to RD or WR Low
Port 2, 4 Address to RD or WR
Low
tAVDV2
0.875 tMCS -20
ns
(CST+0.625)â¢tMCS -20
(CST+2.625)â¢tMCS -20
tAVWL1 0.25 tMCS -5
ns
0.5tMCS -5
2.5 tMCS -10
tAVWL2 0.375 tMCS -5
ns
0.625tMCS -5
2.625 tMCS -10
CST = 0
1⤠CST ⤠3
4 ⤠CST ⤠7
CST = 0
1 ⤠CST ⤠3
4 ⤠CST ⤠7
CST = 0
1 ⤠CST ⤠3
4 ⤠CST ⤠7
Data Valid to WR Transition
tQVWX
-5
ns
Data hold after WR high
tWHQX 0.25 tMCS -5
ns
CST = 0
RD or WR High to ALE, Port 4 tWHCEH
CE or Port 5 PCE High
0.5tMCS -5
1.5 tMCS -10
0
0.25 tMCS -5
1.25 tMCS -5
10
0.25 tMCS +5
1.25 tMCS +5
1 ⤠CST ⤠3
4 ⤠CST ⤠7
ns
CST = 0
1 ⤠CST ⤠3
4 ⤠CST ⤠7
45 of 58
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