DS80C390 Datasheet, PDF (25/58 Pages) Dallas Semiconductor – Dual CAN High-Speed Microprocessor

DS80C390
CONTROLLER AREA NETWORK (CAN) MODULE
The DS80C390 incorporates two CAN controllers that are fully compliant with the CAN 2.0B
specification. CAN is a highly robust, high-performance communication protocol for serial
communications. Popular in a wide range of applications including automotive, medical, heating,
ventilation, and industrial control, the CAN architecture allows for the construction of sophisticated
networks with a minimum of external hardware.
The CAN controllers support the use of 11-bit standard or 29-bit extended acceptance identifiers for up to
15 messages, with the standard 8 byte data field, in each message. Fourteen of the fifteen message
centers are programmable in either transmit or receive modes, with the fifteenth designated as a FIFO-
buffered, receive-only message center to help prevent data overruns. All message centers support two
separate 8-bit media masks and media arbitration fields for incoming message verification. This feature
supports the use of higher level protocols which make use of the first and/or second byte of data as a part
of the acceptance layer for storing incoming messages. Each message center can also be programmed
independently to test incoming data with or without the use of the global masks.
Global controls and status registers in each CAN unit allow the microcontroller to evaluate error
messages, generate interrupts, locate and validate new data, establish the CAN Bus timing, establish
identification mask bits, and verify the source of individual messages. Each message center is
individually equipped with the necessary status and control bits to establish direction, identification mode
(standard or extended), data field size, data status, automatic remote frame request and acknowledgment,
and perform masked or non-masked identification acceptance testing.
COMMUNICATING WITH THE CAN MODULE
The microcontroller interface to the CAN modules is divided into two groups of registers. All of the
global CAN status and control bits as well as the individual message center control/status registers are
located in the Special Function Register map. The remaining registers associated with the message
centers (data identification, identification/arbitration masks, format and data) are located in MOVX data
space. The CMA bit (MCON.5) allows the message centers to be mapped to either 00EE00h-00EEFFh
(CMA=0 or 401000h-4011FFh (CMA=1), reducing the possibility of a memory conflict with application
software. Note that setting the CMA bit employs a special twenty-third address bit that is only used for
addressing CAN MOVX memory. The internal architecture of the DS80C390 requires that the device be
in one of the two 22-bit addressing modes when the CMA bit is set to correctly utilize the twenty-third bit
and access the CAN MOVX memory. A special lockout feature prevents the accidental software
corruption of the control, status and mask registers while a CAN operation is in progress. Each CAN
processor utilizes a total of 15 message centers. Each message center is composed of four specific areas.
These include:
1. Four arbitration registers (C0MxAR0-3 and C1MxAR0-3) which store either the 11-bit or 29-bit
arbitration value. These registers are located in the MOVX memory map.
2. A Format Register (C0MxF and C1MxF) which informs the CAN processor as to the direction
(transmit or receive), the number of data bytes in the message, the Identification Format (standard or
extended), and the optional use of the Identification Mask or Media Mask during message evaluation.
This register is located in the MOVX memory map.
3. Eight data bytes for storage of 0 - 8 bytes of data (C0MxD0-7 and C1MxD0-7) are located in the
MOVX memory map.
4. Message Control Registers (C0MxC and C1MxC) are located in the SFR memory for fast access.
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