IBIS4-6600_09 Datasheet, PDF (12/35 Pages) Cypress Semiconductor – 6.6 MP CMOS Image Sensor

IBIS4-6600 CYII4SM6600AB
Sub Sample Modes
To increase the frame rate for lower resolution and regions of
interest, several sub sampling modes are implemented. The
possible sub sample modes are listed in Table 7. The bits can be
programmed in the IMAGE_CORE register (refer Table 10 on
page 17). To preserve the color information, two adjacent pixels
are read in any mode. The number of pixels that is not read
varies from mode to mode. This is designed as a repeated block
24 pixels wide, which is the lowest common multiple of the
modes described. Including the dummy pixels and the two
additional rows/columns, the number of starting coordinates for
the x and y shift register is 99 in the X direction and 138 in the Y
direction. The total number of pixels, excluding dummy pixels, is
a multiple of 24, and two additional pixels to have the same
window edges independently of the sub sampling mode.
In the X direction, two columns are always addressed at the
same moment, because the signals from the odd and even
columns must be put simultaneously on the corresponding bus.
In the Y direction, the rows are addressed one by one. This
results in slightly different implementations of the sub-sampling
modes for the two directions (Refer Figure 13 and Figure 14 on
page 13).
Table 7. Subsample Patterns
Mode
Bits
A
000
B
001
C
010
D
011
E
1xx
Read
2
2
2
2
2
Step
2
4
6
8
12
Description
Default mode
(Skip 2)
(Skip 4)
(Skip 6)
(Skip 10)
Figure 13. X-Sub Sampling
24 column amplifiers
bus1_S
bus1_R
bus2_S
bus2_R
scan direction
A
B
C
D
E
Document Number: 001-02366 Rev. *E
Page 12 of 35
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