CN8380 Datasheet, PDF (50/91 Pages) Conexant Systems, Inc – integrated quad line interface unit unit for both 1.544 Mbps (T1) and 2.048 Mbps (E1) applications

2.0 Circuit Description
2.7 Clock Rate Adapter
CN8380
Quad T1/E1 Line Interface
Table 2-11. CLAD Reference Frequencies and Configuration Examples (2 of 2)
CLAD
Reference
(kHz)
RSCALE
Phase
Compare
Frequency
(kHz)
VSCALE
CLADV
(kHz)
VSEL
384
000
768
000
1536
000
384
768
1536
010
1536
1101
001
1536
1101
000
1536
1101
20
000
40
000
80
000
160
000
320
000
640
000
1280
000
2560
000
20
40
80
160
320
640
1280
2560
111
2560
1100
110
2560
1100
101
2560
1100
100
2560
1100
011
2560
1100
010
2560
1100
001
2560
1100
000
2560
1100
To configure the CLAD:
1. Choose a CLADO output frequency. Refer to the CLAD Frequency Select
register [CSEL; addr 03] for a list of all possible CLADO output
frequencies.
2. Configure OSEL to select the CLADO output frequency.
3. Select the desired CLAD timing reference frequency from Table 2-11.
4. Configure RSCALE, VSCALE, VSEL from Table 2-11.
Many RSCALE and VSCALE values other than those shown in Table 2-11 are
applicable. For instance, an alternate configuration for an input reference
frequency of 2048 kHz is displayed in Table 2-12.
Table 2-12. Sample Alternate Configuration
CLAD
Reference
(kHz)
RSCALE
Phase
Compare
Frequency
(kHz)
2048
001
1024
VSCALE
CLADV
(kHz)
011
8192
VSEL
0100
RSCALE is a programmable frequency divider which scales the CLAD
reference clock frequency before it is applied to the CLAD’s phase detector.
Similarly, VSCALE scales the CLAD’s internal feedback clock, CLADV. These
two clocks must have the same frequency at the phase detector’s inputs for the
CLAD’s loop to properly lock. So the rule is:
(CLAD reference freq.) ÷ (RSCALE factor) = (CLADV freq.) ÷ (VSCALE factor)
2-28
Conexant
N8380DSA
Advance Information