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CN8380 Datasheet, PDF (1/91 Pages) Conexant Systems, Inc – integrated quad line interface unit unit for both 1.544 Mbps (T1) and 2.048 Mbps (E1) applications | |||
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Advance Information
This document contains information on a product under development. The parametric information
contains target parameters that are subject to change.
CN8380
Quad T1/E1 Line Interface
The CN8380 is a fully integrated quad line interface unit for both 1.544 Mbps (T1) and Distinguishing Features
2.048 Mbps (E1) applications. It is designed to complement T1/E1 framers or operate as ⢠Four T1/E1 short haul line interfaces
a stand-alone line interface to synchronous or plesiochronous mappers and
in a single chip
multiplexers. The device can be controlled through a host mode serial port or by
⢠On-chip CLAD /system synchronizer
hardware mode operation, where device control and status are obtained through
⢠Digital (crystal-less) jitter attenuators
non-multiplexed dedicated pins. Many of these pins are also dedicated to individual
selectable for transmitter/receiver on
channels for maximum flexibility and for use in redundant systems. Integrated in the
each line interface
CN8380 device is a clock rate adapter (CLAD), which provides various low-jitter
⢠Meets AT&T pub 62411 jitter specs
programmable system clock outputs. The receive section of the CN8380 is designed to ⢠Meets ITU G.703, ETS 300 011
recover encoded signals from lines having up to 12 dB of attenuation. The transmit
section consists of a programmable, precision pulse shaper.
(PSTNX) Connections
⢠AMI/B8ZS/HDB3 line codes
⢠Host serial port or hardware only
control modes
Functional Block Diagram
⢠On-chip receive clock recovery
⢠Common transformers for 120/75 â¦
E1 and 100 ⦠T1
⢠Low-power 3.3 V power supply
⢠Transmitter performance monitor
⢠Compatible with latest ANSI, ITU-T,
and ETSI standards
RTIP[1]
RRING[1]
Re-
ceiver
Clock
and
Data
Recovery
RLOS
Detect
ZCS
Decode
RPOSO[1]
RNEGO[1]
RCKO[1]
⢠128-pin MQFP package
⢠Remote and local loopbacks
Applications
XTIP[1]
XRING[1]
Driver
Pulse
Shaping
TAIS
Jitter
Attenuator
ZCS
Decode
TPOSI[1]
TNEGI[1]
TCLK[1]
LIU #1
LIU #2
LIU #3
LIU #4
⢠SONET/SDH multiplexers
⢠T3 and E3/E4 (PDH) multiplexers
⢠ATM multiplexers
⢠Voice compression and voice
processing equipment
⢠WAN routers and bridges
⢠Digital loop carrier terminals (DLC)
⢠HDSL terminal units
JTAG
Test Port
5
Control
47
4
Clock Rate Adapter
JTAG
Test
Signals
Control and Host 10 MHz Variable 1.544
Alarm Signals Serial Fixed Reference MHz
Port Reference
2.048 32.768 8 kHzâ32 MHz
MHz MHz Selectable
⢠Remote concentrators
⢠Central office equipment
⢠PBXs and rural switches
⢠PCM/voice channel banks
⢠Digital access and cross-connect
systems (DACS)
8380_001
Data Sheet
Advance Information
N8380DSA
April 26, 1999
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