CS4237B Datasheet, PDF (84/114 Pages) Cirrus Logic – CrystalClear Advanced Audio System with 3D Sound

CS4237B
8-BIT COMPANDED
The 8-bit companded formats (A-Law and µ-
Law) come from the telephone industry. µ-Law
is the standard for the United States/Japan while
A-Law is used in Europe. Companded audio al-
lows either 64 dB or 72 dB of dynamic range
using only 8-bits per sample. This is accom-
plished using a non-linear companding transfer
function which assigns more digital codes to
lower amplitude analog signals with the sacrifice
of precision on higher amplitude signals. The µ-
Law and A-Law formats of the WSS Codec
conform to the CCITT G.711 specifications. Fig-
ure 23 illustrates the transfer function for both
A- and µ-Law. Please refer to the standards men-
tioned above for an exact definition.
ADPCM COMPRESSION/DECOMPRESSION
In MODE 2 and 3, the WSS Codec also con-
tains Adaptive Differential Pulse Code
Modulation (ADPCM) for improved perform-
ance and compression ratios over µ-Law or
A-Law. The ADPCM format is compliant with
the IMA standard and provides a 4-to-1 com-
pression ratio (i.e. 4 bits are saved for each
16-bit sample captured). For more information
on the specifics of the format, contact the IMA
at [phone]. Figures 18 and 19 illustrate
the ADPCM data flow.
The ADPCM format is unique with respect to
the FIFO depth and the DMA Base register
value. The ADPCM format fills the FIFOs com-
pletely (64 bytes); therefore, the FIFOs hold 64
stereo samples and 128 mono samples. When
samples are being transferred using DMA, the
DMA request stays active for four bytes, similar
to the 16-bit stereo data mode. In PIO mode, the
Status register (R2) indicates which of the four
bytes is being transferred.
When CEN is 0 (capture disabled), the ADPCM
block’s accumulator and step size are cleared.
When CEN is enabled, the ADPCM block will
start converting. Care should be taken to insure
that the "overrun" condition never occurs, other-
wise the data may not be constructed properly
upon playback. If pausing the capture sequence
is desired, the ADPCM Capture Freeze bit (ACF,
I23) should be set. When this bit is set, the
ADPCM algorithm will continue to operate until
a complete word (4 bytes) is written to the FIFO.
Then the ADPCM’s block accumulator and step
size will be frozen. The software must continue
+FS
0
Figure 22. Linear Transfer Functions
84
-FS
A-Law: 2Ah
15h
55h/D5h
95h
AAh
u-Law: 00h
3Fh
7Fh/FFh
BFh
80h
DIGITAL CODE
Figure 23. Companded Transfer Functions
DS213PP4