CS4237B Datasheet, PDF (71/114 Pages) Cirrus Logic – CrystalClear Advanced Audio System with 3D Sound

CS4237B
SRS Mono-to-Stereo Synthesis
In addition to creating 3D Stereo images from
stereo program material, the 3DM bit in C3 ex-
pands monaural signals to a wider image format.
The first step in the conversion of a monaural
audio signal to 3D sound is the creation of a
synthetic stereo signal. This is accomplished in
the SRS 3D Mono system (3DM=1) through a
technique that makes use of constant phase fil-
ters. The original mono signal is applied to two
banks of filters which create two outputs with
one shifted 90 degrees relative to the other. Due
to the precedence effect, the ear will perceive the
leading signal as the direct sound (analogous to
L+R) and the lagging signal as ambience infor-
mation (analogous to L-R or difference signal).
The lead and lag signals are dematrixed using
conventional sum and difference techniques, into
synthetic left and right stereo signals. These sig-
nals are then applied to the SRS 3D Stereo
process. Because the synthetic L, R, L+R, and
processed L-R signals are generated synthetically
from a mono input, their relationships remain
constant, and user control of the L+R and L-R
signal levels ("Center" and "Space") are not re-
quired and are internally fixed.
Consumer IEC-958 Digital Output
The CS4237B supports the industry standard
IEC-958 consumer digital interface. Sometimes
this standard is referred to S/PDIF which refers
to an older version of this standard. This output
provides an interface, external to the PC, for
storing digital audio (as in a DAT or recordable
CD-ROM) or playing digital audio from digital
speakers.
The interface is enabled by turning on the CSPE
bit in C4 and SPE in I16. The data is sent out
the SDOUT DSP serial interface pin. The other
DSP serial interface pins still function properly
when SDOUT is used for the IEC-958 interface.
DS213PP4
The SDOUT pin can either be on joystick B’s
CX pin or it can be on the peripheral port data
bus pin XD3, controlled by the SPS bit in the
Hardware Configuration data or register C8.
The data going out SDOUT can come from the
ADC or from the DAC interface (which includes
QSound 3D Sound if enabled). This functionality
is controlled by the 3DSO bit in register C3.
For the receiving device to function properly, the
Channel Status bits in C5 and C6 must be set
properly. See the Sanchez AES paper An Under-
standing and Implementation of the SCMS Serial
Copy Management System for Digital Audio
Transmission for more details on setting the
Channel Status information.
Figure 8 illustrates the circuit necessary for im-
plementation of the IEC-958 consumer interface.
An external buffer is required to drive the cur-
rent needed to drive the 75 Ω interface (415 Ω
or 12 mA).
SDOUT
374 Ω
90.9 Ω
RCA
Phono
Figure 8. IEC-958 Consumer Interface
The transformers can be obtained from:
Pulse Engineering
Telecom Products Group
San Diego, CA
[phone]
or
Schott Corporation
Wayzata, MN
[phone]
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