CS4237B Datasheet, PDF (104/114 Pages) Cirrus Logic – CrystalClear Advanced Audio System with 3D Sound

CS4237B
CS9236 Wavetable Serial Port Interface
A digital interface to the Crystal CS9236 Single-Chip Wavetable Music Synthesizer is provided
that allows the CS9236 PCM audio data to be summed digitally on the Crystal Codec without
the need for an external DAC. The Wavetable Serial Port interface pins are multiplexed with the
XD7-XD5 external bus pins. This serial port is enabled via the WTEN bit which is located in
the Global Configuration byte in the E²PROM Hardware Configuration data, or C8. The
interface typically consists of the three pins listed below as well as:
connecting the Crystal Codec MIDOUT pin to the CS9236 MIDI_IN pin, and
connecting the Crystal Codec BRESET pin to the CS9236 PDN and RST pins.
(The BRES bit in C8 provides a maximum software power-down mode for the
CS9236 by driving the BRESET signal low whenever BRES is set.)
SDATA - Wavetable Serial Audio Data, Input
This pin is multiplexed with the XD7 external data bus pin. When use as SDATA, this input
supplies the serial audio PCM data to be digitally mixed to the DACs of the Crystal codec. The
data consists of left and right channel 16-bit data delineated by LRCLK. This pin should be
connected to the SOUT output pin on the CS9236. This pin should also have a weak pull-down
resistor of approx. 100 kΩ to minimize power-down currents and allow for stuffing options.
LRCLK - Wavetable Serial Left/Right Clock, Input
This pin is multiplexed with the XD6 external data bus pin. When use as LRCLK, this input
supplies the serial data alignment signal that delineates left from right data. This pin should be
connected to the LRCLK output pin on the CS9236. This pin should also have a weak
pull-down resistor of approx. 100 kΩ to minimize power-down currents and allow for stuffing
options.
MCLK - Wavetable Master Clock, Output
This pin is multiplexed with the XD5 external data bus pin. When use as MCLK, this output
supplies the 16.9344 MHz master clock that controls all the timing on the CS9236. This pin
should be connected to the MCLK5I input pin on the CS9236. MCLK can be disabled in
software using the DMCLK bit in C8 in the Control logical device space. DMCLK provides a
partial software power-down mode for the CS9236.
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