CS4237B Datasheet, PDF (54/114 Pages) Cirrus Logic – CrystalClear Advanced Audio System with 3D Sound

CS4237B
LSPM
Left DSP Serial Port Mute. When set
to 1, the Left DSP Serial Port input
(SDIN) to the digital mixer is muted.
Serial
Port
LSPA5-A0
0 to -94.5 dB
LSPM
To Digital Mixer
Summer
Right DSP Serial Port Volume (X9)
Default = 0x000000
D7 D6 D5 D4 D3 D2 D1 D0
RSPM res RSPA5 RSPA4 RSPA3 RSPA2 RSPA1 RSPA0
RSPA4-RSPA0 Right DSP Serial Port Attenuation.
The least significant bit represents
1.5 dB, with 000000 = 0 dB.
See Table 6.
res
Reserved. Must write 0. Could read
as 0 or 1.
RSPM
Right DSP Serial Port Mute. When
set to 1, the Right DSP Serial Port
input (SDIN) to the digital mixer is
muted.
Serial
Port
RSPA5-A0
0 to -94.5 dB
RSPM
To Digital Mixer
Summer
Right Loopback Monitor Volume (X10)
Default = 0x111111
D7 D6 D5 D4 D3 D2 D1 D0
SLBE res RLBA5 RLBA4 RLBA3 RLBA2 RLBA1 RLBA0
RLBA5-RLBA0 Right Channel Loopback Attenuation.
These bits determine the attenuation
of the loopback from the right ADC
to the right digital mixer. LBE in I13
must be set to enable loopback. The
least significant bit represents -1.5
dB, with 000000 = 0 dB. See Table 6.
res
Reserved. Must write 0. Could read
as 0 or 1.
SLBE
Stereo LoopBack Enable. When set to
1, control over the Left and Right
loopback volume is separated.
RLBA5-RLBA0 (X10) control the
Right channel, and LBA5-LBA0 (I13)
control the Left channel.
When set to 0, LBA5-LBA0 (I13) con-
trol both channels.
DAC Mute and IFSE Enable (X11)
Default = 110xxxxx
D7 D6 D5 D4 D3 D2 D1 D0
LDMIM RDMIM IFSE res res res res res
res
Reserved. Must write 0. Could read
as 0 or 1.
IFSE
Independent Sample Freq. Enable.
When set to 1, the extended
registers X12 and X13 are used to
set the sample rate, and registers I8,
I10 (OSM1,0), and I22 are ignored.
X12 and X13 cannot be modified un-
less this bit is set to 1.
RDMIM
Right Digital Master Input Mixer Mute.
When set to 1, the output from the
Right DAC is Muted to the Right in-
put mixer. See Figure 4.
LDMIM
Left Digital Master Input Mixer Mute.
When set to 1, the output from the
Left DAC is Muted to the Left input
mixer. See Figure 4.
Independent ADC Fs (X12)
Default = xxxxxxxx
D7 D6 D5 D4 D3 D2 D1 D0
SRAD7 SRAD6 SRAD5 SRAD4 SRAD3 SRAD2 SRAD1 SRAD0
SRAD7-SRAD0 Sample Rate frequency select for
the A/D converter. This register is
only in effect (and can only be writ-
ten) while IFSE=1 in X11.
See Table 14.
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