T32UC3L0128_14 Datasheet, PDF (742/852 Pages) ATMEL Corporation – Compact Single-cycle RISC Instruction Set Including DSP Instructions

31.3.5 Block Diagram
Figure 31-1. On-Chip Debug Block Diagram
aWire
JTAG
AT32UC3L0128/256
aWire
JTAG
AUX
On-Chip Debug
Service Access Bus
Debug PC
Debug
Instruction
Breakpoints
Memory
Service
Unit
Transmit Queue
Watchpoints
Program
Trace
Data Trace
Ownership
Trace
CPU
Internal
SRAM
HSB Bus Matrix
Memories and
peripherals
31.3.6
SAB-based Debug Features
A debugger can control all OCD features by writing OCD registers over the SAB interface. Many
of these do not depend on output on the AUX port, allowing an aWire- or JTAG-based debugger
to be used.
A JTAG-based debugger should connect to the device through a standard 10-pin IDC connector
as described in the AVR32UC Technical Reference Manual.
An aWire-based debugger should connect to the device through the RESET_N pin.
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