T32UC3L0128_14 Datasheet, PDF (481/852 Pages) ATMEL Corporation – Compact Single-cycle RISC Instruction Set Including DSP Instructions

AT32UC3L0128/256
Figure 21-12. Combining a Write and Read Transfer
THR
DATA0
DATA1
RHR
TWD S DADR W A
DATA0
A
DATA1
NA Sr
DADR
RA
DATA2
DATA2
A
DATA3
DATA3
AP
SR.IDLE
1
TXRDY
RXRDY
To generate this transfer:
1. Write CMDR with START=1, STOP=0, DADR, NBYTES=2 and READ=0.
2. Write NCMDR with START=1, STOP=1, DADR, NBYTES=2 and READ=1.
3. Wait until SR.TXRDY==1, then write first data byte to transfer to THR.
4. Wait until SR.TXRDY==1, then write second data byte to transfer to THR.
5. Wait until SR.RXRDY==1, then read first data byte received from RHR.
6. Wait until SR.RXRDY==1, then read second data byte received from RHR.
21.8.7.4
Read Followed by Write
Consider the following transfer:
START, DADR+R, DATA+A, DATA+NA, REPSTART, DADR+W, DATA+A, DATA+A, STOP.
Figure 21-13. Combining a Read and Write Transfer
THR
DATA2
DATA3
RHR
TWD S SADR R A
DATA0
DATA3
1
DATA0
A
DATA1
A Sr
DADR
WA
DATA2
A
DATA3 NA P
SR.IDLE
2
TXRDY
RXRDY
Read
TWI_RHR
To generate this transfer:
1. Write CMDR with START=1, STOP=0, DADR, NBYTES=2 and READ=1.
2. Write NCMDR with START=1, STOP=1, DADR, NBYTES=2 and READ=0.
3. Wait until SR.RXRDY==1, then read first data byte received from RHR.
4. Wait until SR.RXRDY==1, then read second data byte received from RHR.
5. Wait until SR.TXRDY==1, then write first data byte to transfer to THR.
6. Wait until SR.TXRDY==1, then write second data byte to transfer to THR.
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