T32UC3L0128_14 Datasheet, PDF (683/852 Pages) ATMEL Corporation – Compact Single-cycle RISC Instruction Set Including DSP Instructions

28.7.8 Touch Group x Configuration Register 0
Name:
TGxCFG0
Access Type:
Read/Write
Offset:
0x20, 0x28
Reset Value:
0x00000000
AT32UC3L0128/256
31
30
29
28
27
26
25
24
DIV[15:8]
23
22
21
20
19
18
17
16
DIV[7:0]
15
14
13
12
11
10
9
8
CHLEN
7
6
5
4
3
2
1
0
SELEN
• DIV: Clock Divider
The prescaler is used to ensure that the CLK_CAT clock is divided to around 1 MHz to produce the sampling clock.The
prescaler uses the following formula to generate the sampling clock:
Sampling clock = CLK_CAT / (2(DIV+1))
• CHLEN: Charge Length
For the QTouch method, specifies how many sample clock cycles should be used for transferring charge to the sense capacitor.
• SELEN: Settle Length
For the QTouch method, specifies how many sample clock cycles should be used for settling after charge transfer.
32145C–06/2013
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