T32UC3L0128_14 Datasheet, PDF (482/852 Pages) ATMEL Corporation – Compact Single-cycle RISC Instruction Set Including DSP Instructions

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21.8.8
Ten Bit Addressing
Writing a one to CMDR.TENBIT enables 10-bit addressing in hardware. Performing transfers
with 10-bit addressing is similar to transfers with 7-bit addresses, except that bits 9:7 of
CMDR.SADR must be written appropriately.
In Figure 21-14 and Figure 21-15, the grey boxes represent signals driven by the master, the
white boxes are driven by the slave.
21.8.8.1
Master Transmitter
To perform a master transmitter transfer:
1. Write CMDR with TENBIT=1, REPSAME=0, READ=0, START=1, STOP=1 and the
desired address and NBYTES value.
Figure 21-14. A Write Transfer with 10-bit Addressing
1 1 1 1 0XX0
S
SLAVE ADDRESS
1st 7 bits
RW A1
SLAVE ADDRESS
2nd byte
A2 DATA A
DATA AA P
21.8.8.2
Master Receiver
When using master receiver mode with 10-bit addressing, CMDR.REPSAME must also be con-
trolled. CMDR.REPSAME must be written to one when the address phase of the transfer should
consist of only 1 address byte (the 11110xx byte) and not 2 address bytes. The I²C standard
specifies that such addressing is required when addressing a slave for reads using 10-bit
addressing.
To perform a master receiver transfer:
1. Write CMDR with TENBIT=1, REPSAME=0, READ=0, START=1, STOP=0,
NBYTES=0 and the desired address.
2. Write NCMDR with TENBIT=1, REPSAME=1, READ=1, START=1, STOP=1 and the
desired address and NBYTES value.
Figure 21-15. A Read Transfer with 10-bit Addressing
1 1 1 1 0XX0
S
SLAVE ADDRESS
1st 7 bits
RW A1
SLAVE ADDRESS
2nd byte
1 1 1 1 0XX1
A2 Sr
SLAVE ADDRESS
1st 7 bits
RW A3 DATA A
DATA A P
21.8.9
SMBus Mode
SMBus mode is enabled and disabled by writing to the SMEN and SMDIS bits in CR. SMBus
mode operation is similar to I²C operation with the following exceptions:
• Only 7-bit addressing can be used.
• The SMBus standard describes a set of timeout values to ensure progress and throughput on
the bus. These timeout values must be written into SMBTR.
• Transmissions can optionally include a CRC byte, called Packet Error Check (PEC).
• A dedicated bus line, SMBALERT, allows a slave to get a master’s attention.
• A set of addresses have been reserved for protocol handling, such as Alert Response
Address (ARA) and Host Header (HH) Address.
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