AT17LV65_14 Datasheet, PDF (13/23 Pages) ATMEL Corporation – FPGA Configuration EEPROM Memory

10.5 Thermal Resistance Coefficients
Table 10-8. Thermal Resistance Coefficients
Package Type
Leadless Array
8CN4
Package (LAP)
Plastic Dual Inline
8P3
Package (PDIP)
Plastic Gull Wing
8S1
Small Outline (SOIC)
Plastic Leaded Chip
20J
Carrier (PLCC)
Plastic Gull Wing
20S2
Small Outline (SOIC)
Thin Plastic Quad
44A
Flat Package (TQFP)
_JC [C/W]
_JA [C/W]⁽¹⁾
_JC [C/W]
_JA [C/W]⁽¹⁾
_JC [C/W]
_JA [C/W]⁽¹⁾
_JC [C/W]
_JA [C/W]⁽¹⁾
_JC [C/W]
_JA [C/W]⁽¹⁾
_JC [C/W]
_JA [C/W]⁽¹⁾
AT17LV65/128/256⁽²⁾
45
115.71
37
107
45
150
35
90
—
—
AT17LV512/010
45
135.71
37
107
—
—
35
90
—
—
AT17LV002
45
159.60
—
—
—
—
35
90
17
62
AT17LV040
—
—
—
—
—
—
—
—
—
—
17
62
Notes: 1. Airflow = 0ft/min.
2. The AT17LV65 and AT17LV128 are not recommended for new designs.
AT17LV65/128/256/512/010/002/040 [DATASHEET] 13
Atmel-2321J-FPGA-AT17LV65-128-256-512-010-002-040-Datasheet_102014