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AT17LV65_14 Datasheet, PDF (10/23 Pages) ATMEL Corporation – FPGA Configuration EEPROM Memory
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Table 10-3. DC Characteristics for VCC = 5.0V ± 10%
AT17LV65/128/256(1)
Symbol Description
Min
Max
VIH
High-level Input Voltage
2.0
VCC
VIL
Low-level Input Voltage
0
0.8
High-level Output Voltage
VOH
(IOH = -2mA)
3.60
Low-level Output Voltage
VOL
(IOL = +3mA)
0.37
ICCA
Supply Current, Active Mode
10
Input or Output Leakage Current
IL
(VIN = VCC or GND)
-10
10
ICCS
Supply Current, Standby Mode
150
AT17LV512/010 AT17LV002/040
Min Max Min Max Units
2.0
VCC
2.0
VCC
V
0
0.8
0
0.8
V
3.76
3.76
V
0.37
0.37
V
10
10
mA
-10
10
-10
10
μA
200
350
μA
Note: 1. The AT17LV65 and AT17LV128 are not recommended for new designs.
10.4 AC Characteristics
Table 10-4. AC Characteristics for VCC = 3.3V ± 10%
AT17LV65/128/256(3)
Symbol
TOE(1)
TCE(1)
TCAC(1)
TOH
TDF(2)
TLC
THC
TSCE
Description
OE to Data Delay
CE to Data Delay
CLK to Data Delay
Data Hold from CE, OE, or CLK
CE or OE to Data Float Delay
CLK Low Time
CLK High Time
CE Setup Time to CLK
(to guarantee proper counting)
Min
Max
55
60
80
0
55
25
25
60
CE Hold Time from CLK
THCE
(to guarantee proper counting)
0
OE High Time
THOE
(guarantees counter is reset)
25
FMAX
Maximum Clock Frequency
10
AT17LV512/010/002/040
Min
Max
Units
55
ns
60
ns
60
ns
0
ns
50
ns
25
ns
25
ns
35
ns
0
ns
25
ns
10
MHz
Notes: 1. AC test lead = 50pF.
2. Float delays are measured with 5pF AC loads. Transition is measured ± 200mV from steady-state active levels.
3. The AT17LV65 and AT17LV128 are not recommended for new designs.
10 AT17LV65/128/256/512/010/002/040 [DATASHEET]
Atmel-2321J-FPGA-AT17LV65-128-256-512-010-002-040-Datasheet_102014
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