EP3C10U256C6N Datasheet, PDF (50/274 Pages) Altera Corporation – Cyclone III Device Family Overview

3–16
Chapter 3: Memory Blocks in the Cyclone III Device Family
Design Considerations
Same-Port Read-During-Write Mode
This mode applies to a single-port RAM or the same port of a true dual-port RAM. In
the same port read-during-write mode, there are two output choices: New Data mode
(or flow-through) and Old Data mode. In New Data mode, new data is available on
the rising edge of the same clock cycle on which it was written. In Old Data mode, the
RAM outputs reflect the old data at that address before the write operation proceeds.
When using New Data mode together with byteena, you can control the output of the
RAM. When byteena is high, the data written into the memory passes to the output
(flow-through). When byteena is low, the masked-off data is not written into the
memory and the old data in the memory appears on the outputs. Therefore, the
output can be a combination of new and old data determined by byteena.
Figure 3–15 and Figure 3–16 show sample functional waveforms of same port
read-during-write behavior with both New Data and Old Data modes, respectively.
Figure 3–15. Same Port Read-During Write: New Data Mode
clk_a
wren_a
rden_a
address_a
data_a
q_a (asynch)
a0
a1
A
B
C
D
E
F
A
B
C
D
E
F
Figure 3–16. Same Port Read-During-Write: Old Data Mode
clk_a
wren_a
rden_a
address_a
data_a
q_a (asynch)
a0
a1
A
B
C
D
E
F
a0(old data)
A
B
a1(old data)
D
E
Mixed-Port Read-During-Write Mode
This mode applies to a RAM in simple or true dual-port mode, which has one port
reading and the other port writing to the same address location with the same clock.
Cyclone III Device Handbook
Volume 1
December 2011 Altera Corporation