EP3C10U256C6N Datasheet, PDF (108/274 Pages) Altera Corporation – Cyclone III Device Family Overview

6–10
Chapter 6: I/O Features in the Cyclone III Device Family
OCT Support
Figure 6–4 shows the external calibration resistors setup on the RUP and RDN pins and
the associated OCT calibration circuitry.
Figure 6–4. Cyclone III Device Family On-Chip Series Termination with Calibration Setup
Cyclone III Device Family OCT with
Calibration with RUP and RDN pins
V_CCIO
RUP
External
Calibration
Resistor
OCT
Calibration
Circuitry
V_CCIO
RDN
External
Calibration
Resistor
GND
RUP and RDN pins go to a tri-state condition when calibration is completed or not
running. These two pins are dual-purpose I/Os and function as regular I/Os if you
do not use the calibration circuit.
On-Chip Series Termination Without Calibration
The Cyclone III device family supports driver impedance matching to the impedance
of the transmission line, which is typically 25  or 50 . When used with the output
drivers, OCT sets the output driver impedance to 25  or 50 . The Cyclone III device
family also supports output driver series termination (R_S = 50 ) for SSTL-2 and
SSTL-18.
Cyclone III Device Handbook
Volume 1
July 2012 Altera Corporation