EP3C10U256C6N Datasheet, PDF (241/274 Pages) Altera Corporation – Cyclone III Device Family Overview

Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family
Remote System Upgrade
9–83
■ Cyclone III device family logic array triggered a reconfiguration cycle, possibly
after downloading a new application configuration image
■ External configuration reset (nCONFIG) assertion
■ User watchdog timer time out
Table 9–28 lists the contents of the current state logic in the status register, when the
remote system upgrade master state machine is in factory configuration or
application configuration accessing the factory information or application
information respectively, and the MSEL pin setting is set to AS or AP configuration
scheme. The status register bit in Table 9–28 lists the bit positions in a 32-bit logic.
Table 9–28. Remote System Upgrade Current State Logic Contents In Status Register ⁽¹⁾
Current State Logic
Factory information ⁽²⁾
Status Register Bit
31:30
29:24
23:0
Definition
Master State Machine
current state
Reserved bits
Boot address
Description
The current state of the RSU master
state machine
Padding bits that are set to all 0's
The current 24-bit boot address that was
used by the configuration scheme as the
start address to load the current
configuration.
31:30
Master State Machine The current state of the RSU master
current state
state machine
Application information
part 1 ⁽³⁾
29
User watchdog timer The current state of the user watchdog
enable bit
enable, which is active high
Application information
part 2 ⁽³⁾
28:0
31:30
29:24
23:0
User watchdog timer
time-out value
Master State Machine
current state
Reserved bits
Boot address
Notes to Table 9–28:
(1) The MSEL pin setting is in the AS or AP configuration scheme.
(2) The RSU master state machine is in factory configuration.
(3) The RSU master state machine is in application configuration.
The current entire 29-bit
watchdog time-out value
The current state of the RSU master
state machine
Padding bits that are set to all 0’s
The current 24-bit boot address that was
used by the configuration scheme as the
start address to load the current
configuration
The previous two application configurations are available in the previous state
registers (previous state register 1 and previous state register 2), but only for
debugging purposes.
August 2012 Altera Corporation
Cyclone III Device Handbook
Volume 1