EP2S90F1020C4 Datasheet, PDF (111/238 Pages) Altera Corporation – Section I. Stratix II Device Family Data Sheet

Stratix II Architecture
Figure 2–61. Fast PLL & Channel Layout in the EP2S60 to EP2S180 Devices Note (1)
Fast
PLL 7
Fast
PLL 10
2
2
4
LVDS
Clock
DPA
Clock
Quadrant
Quadrant
DPA
Clock
4
LVDS
Clock
4
2
Fast
PLL 1
4
2
Fast
PLL 4
Fast
PLL 2
2
Fast
PLL 3
2
LVDS
4
Clock
DPA
Clock
Quadrant
Quadrant
DPA
Clock
LVDS
Clock
4
2
Fast
PLL 8
2
Fast
PLL 9
Note to Figure 2–61:
(1) See Tables 2–22 through 2–26 for the number of channels each device supports.
Altera Corporation
May 2007
2–103
Stratix II Device Handbook, Volume 1