EP20K400EFI672-2X Datasheet, PDF (111/117 Pages) Altera Corporation – Programmable Logic Device Family

APEX 20K Programmable Logic Device Family Data Sheet
Table 106. EP20K1500E Minimum Pulse Width Timing Parameters
Symbol
t_CH
t_CL
t_CLRP
t_PREP
t_ESBCH
t_ESBCL
t_ESBWP
t_ESBRP
-1 Speed Grade
Min
Max
1.25
1.25
0.20
0.20
1.25
1.25
1.28
1.11
-2 Speed Grade
Min
Max
1.43
1.43
0.20
0.20
1.43
1.43
1.51
1.29
-3 Speed Grade
Unit
Min
Max
1.67
ns
1.67
ns
0.20
ns
0.20
ns
1.67
ns
1.67
ns
1.65
ns
1.41
ns
Table 107. EP20K1500E External Timing Parameters
Symbol
t_{I N S U}
t_{I N H}
t_{O U T C O}
t_{I N S U P L L}
t_{I N H P L L}
t_{O U T C O P L L}
-1 Speed Grade
Min
Max
3.09
0.00
2.00
6.18
1.94
0.00
0.50
2.67
-2 Speed Grade
Min
Max
3.30
0.00
2.00
6.81
2.08
0.00
0.50
2.99
-3 Speed Grade
Unit
Min
Max
3.58
ns
0.00
ns
2.00
7.36
ns
-
ns
-
ns
-
-
ns
Altera Corporation
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