EP20K400EFI672-2X Datasheet, PDF (102/117 Pages) Altera Corporation – Programmable Logic Device Family

APEX 20K Programmable Logic Device Family Data Sheet
Table 87. EP20K400E f_MAX Routing Delays
Symbol
-1 Speed Grade
t_F1-4
t_F5-20
t_F20+
Min
Max
0.25
1.01
3.71
-2 Speed Grade
Min
Max
0.25
1.12
3.92
Table 88. EP20K400E Minimum Pulse Width Timing Parameters
Symbol
t_CH
t_CL
t_CLRP
t_PREP
t_ESBCH
t_ESBCL
t_ESBWP
t_ESBRP
-1 Speed Grade
Min
Max
1.36
1.36
0.18
0.18
1.36
1.36
1.17
0.94
-2 Speed Grade
Min
Max
2.22
2.26
0.18
0.18
2.26
2.26
1.38
1.09
Table 89. EP20K400E External Timing Parameters
Symbol
t_{I N S U}
t_{I N H}
t_{O U T C O}
t_{I N S U P L L}
t_{I N H P L L}
t_{O U T C O P L L}
-1 Speed Grade
Min
Max
2.51
0.00
2.00
5.25
3.221
0.00
0.50
2.25
-2 Speed Grade
Min
Max
2.64
0.00
2.00
5.79
3.38
0.00
0.50
2.45
-3 Speed Grade
Unit
Min
Max
0.26
ns
1.25
ns
4.17
ns
-3 Speed Grade
Unit
Min
Max
2.35
ns
2.35
ns
0.19
ns
0.19
ns
2.35
ns
2.35
ns
1.56
ns
1.25
ns
-3 Speed Grade
Unit
Min
Max
2.77
ns
0.00
ns
2.00
6.32
ns
-
ns
-
ns
-
-
ns
102
Altera Corporation