EP20K400EFI672-2X Datasheet, PDF (108/117 Pages) Altera Corporation – Programmable Logic Device Family

APEX 20K Programmable Logic Device Family Data Sheet
Table 99. EP20K1000E f_MAX Routing Delays
Symbol
-1 Speed Grade
-2 Speed Grade
t_F1-4
t_F5-20
t_F20+
Min
Max
Min
Max
0.27
0.27
1.45
1.63
4.15
4.33
Table 100. EP20K1000E Minimum Pulse Width Timing Parameters
Symbol
t_CH
t_CL
t_CLRP
t_PREP
t_ESBCH
t_ESBCL
t_ESBWP
t_ESBRP
-1 Speed Grade
Min
Max
1.25
1.25
0.20
0.20
1.25
1.25
1.28
1.11
-2 Speed Grade
Min
Max
1.43
1.43
0.20
0.20
1.43
1.43
1.51
1.29
Table 101. EP20K1000E External Timing Parameters
Symbol
t_{I N S U}
t_{I N H}
t_{O U T C O}
t_{I N S U P L L}
t_{I N H P L L}
t_{O U T C O P L L}
-1 Speed Grade
Min
Max
2.70
0.00
2.00
5.75
1.64
0.00
0.50
2.25
-2 Speed Grade
Min
Max
2.84
0.00
2.00
6.33
2.09
0.00
0.50
2.99
-3 Speed Grade
Unit
Min
Max
0.27
ns
1.75
ns
4.97
ns
-3 Speed Grade
Unit
Min
Max
1.67
ns
1.67
ns
0.20
ns
0.20
ns
1.67
ns
1.67
ns
1.65
ns
1.41
ns
-3 Speed Grade
Unit
Min
Max
2.97
ns
0.00
ns
2.00
6.90
ns
-
ns
-
ns
-
-
ns
108
Altera Corporation