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AK7744VT Datasheet, PDF (9/50 Pages) Asahi Kasei Microsystems – 24bit 3ch ADC + 24bit 4ch DAC with Audio DSP
[ASAHI KASEI]
[AK7744]
7. Electric characteristics
(1) Analog characteristics
(Unless otherwise specified, Ta = 25°C; AVDD, DVDD = 3.3V; VREFH = AVDD;
BITCLK = 64 fs; Signal frequency 1 kHz;
Measuring frequency = 20 Hz to 20 kHz @48kHz;
DSP section in the reset state; ADC with all differential inputs)
Parameter
min
typ
max
Unit
ADC1
Section
Resolution
Dynamic characteristics
24
Bits
S/(N+D) fs = 48kHz (-1dB)
(Note1)
76
86
dB
Dynamic range fs = 48kHz (A filter) (Note2)
89
97
dB
S/N
fs = 48kHz (A filter)
89
97
dB
Inter-channel isolation (f =1 kHz) (Note3)
90
120
dB
DC accuracy
Inter-channel gain mismatching
0.1
0.3
dB
Analog input
Input voltage(Differencial)
(Note4)
±1.85
±2.00
±2.15
Vp-p
Input Voltage(Single-ended)
(Note5)
1.85
2.00
2.15
Vp-p
Input impedance
(Note6)
22
33
kΩ
ADC2
Section
Resolution
Dynamic characteristics
24
Bits
S/(N+D) fs = 48kHz (-1dB)
(Note1)
76
86
dB
Dynamic range fs = 48kHz (A filter) (Note2)
89
97
dB
S/N
fs = 48kHz (A filter)
89
97
dB
Analog input
Input voltage
1.85
2.00
2.15
Vp-p
Input impedance
22
33
kΩ
DAC
Section
Resolution
Dynamic characteristics
24
Bits
S/(N+D) fs = 48kHz (0dB)
80
92
dB
Dynamic range fs = 48kHz (A filter) (Note2)
99
107
dB
S/N
fs = 48kHz (A filter)
99
107
dB
Inter-channel isolation (f =1 kHz) (Note7)
90
115
dB
DC accuracy
Inter-channel gain mismatching (Note7)
0.2
0.5
dB
Analog output
Output voltage (AOUT+)-(AOUT-) (Note8)
3.36
3.66
3.96
Vp-p
Load resistance
5
kΩ
Note: 1. In case of the using single-ended input this value does not guarantee.
2. Indicates S/(N+D) when a -60 dB signal is applied.
3. Specified for L and R of each input selector.
4. This applies to AINL+, AINL-, AINR+ , AINR-, A2IN+ and A2IN- pins.
The fullscale (∆AIN = (AIN+) - (AIN-)) can be represented by (±FS = ±(VREFH-AVSS)×(2.0/3.3)).
5. This applies to AINL1,AINR1,AINL2,AINR2,AINL3,AINR3,AINL4,AINR4,AINL5,AINR5 and
A2IN1. The fullscale of single-ended input is (FS=(VREFH-AVSS) × (2.0/3.3)).
6. This applies to AINL1, AINR1, AINL2, AINR2, AINL3, AINR3, AINL4, AINR4, AINL5, AINR5
AINL+,AINL-,AINR+, AINR-,A2IN+,A2IN- and A2IN1.
7. Specified for L and R of each DAC.
8. The full-scale output voltage when VREFH=AVDD.
<MS0167-E-00>
-9-
2002/10