AK7744VT Datasheet, PDF (21/50 Pages) Asahi Kasei Microsystems – 24bit 3ch ADC + 24bit 4ch DAC with Audio DSP

[ASAHI KASEI]
[AK7744]
2-1) CONT0 : clock and interface selector
This register is enabled only at system reset state ( S_RESET =”L”).
Command Code Name
D7
D6
D5
D4
D3
D2
D1
D0
Default
Write Read
60h
70h
CONT0
CFS1
CFS0
DIF
DIF1
DIF0
DISCK SELCKO
X
00h
c D7,D6:CFS1 CFS0 Master clock select
Mode
1
2
3
4
CFS1(D7)
0
0
1
1
CFS0(D6)
0
1
0
1
Enable fs []: Master clock Note) It can use only as following frequency.
512fs(fs=48kHz[24.576MHz],44.1kHz[22.5792MHz],32kHz[16.384MHz])
1536fs(fs=16kHz[24.576MHz],14.7kHz[22.5792MHZ])
2048fs(fs=12kHz[24.576MHz],11.025kHz[22.5792MHz])
3072fs(fs=8kHz[24.576MHz])
d D5:DIF Audio interface selector
0:AKM method
1: I2S compatible ( In this case, all input / output pins are I2S compatible.)
e D4,D3:DIF1,DIF0 SDIN Input mode selector
Mode
D4
D3
1
0
0
MSB justified (24bit)
2
0
1
LSB justified (24bit)
3
1
0
LSB justified (20bit)
4
1
1
LSB justified (16bit)
Note) When D5= 1, the state is I2S compatible independently of mode setting. In this case, set D4 and D3 to Mod
e 1.
f D2:DISCK LRCLK,BITCLKOutput control
0: Normal Operation
1: In MASTER mode, this setting can fix BITCLK=”L” and LRCLK=”H”. (Note In case of I ² S
compatible setting, it become LRCLK=”L”.) This setting is available only when using the AK7744’s analog
inputs and analog outputs. When this mode is selected, SDIN and SDOUT are not available.
g D1:SELCKO CLKO Output selector.
0:CLKO outputs the same frequency as XTI.
1:CLKO outputs “L” level.
Note) When CLKO=”1”, after setting CONT0 (when the last clock of SCLK rise up) CLKO will change its
frequency.
h D0: Always 0
Note) Underlined settings of c~g = default setting.
<MS0167-E-00>
- 21 -
2002/10