AK7744VT Datasheet, PDF (48/50 Pages) Asahi Kasei Microsystems – 24bit 3ch ADC + 24bit 4ch DAC with Audio DSP

[ASAHI KASEI]
[AK7744]
22u
+
10k
Signal
10k
+10V
-
+
-1 0 V
10k
10k
-
+
+
NJM5532D 4.7u
Vop = VA+ = 3.3V
2.00Vpp
AIN
Fig. 2 Example of input buffer circuit (single ended input)
An analog signal can be applied to the AK7744 is single ended mode. In this case, apply the analog signal
(the full scale is 2.0Vpp when the internal reference voltage is used). However, use of a low saturated operational a
mplifier is recommended if the operational amplifier is driven by the 3.3-volt power supply.
4) Analog output
1.83Vpp
5.1k
AOUT-
AIN-
AOUT+
33u 5.1k
+
390
6.8n
6.8n
33u 5.1k
390
+
1.83Vpp
5.1k
750p
Vop
-
22u ₂₂₀
+
+
NJM5532D
10k
750p
3.66Vp
AOUT
Fig.3 Example of output LPF circuit
The analog outputs are full differential outputs and nominally ±1.83Vpp (typ @ VRDAH=3.3V) centered in the internal
common voltage about (AVDD/2). The differential outputs are summed externally, VAOUT=(AOUT+)-(AOUT-)
between AOUT+ and AOUT-.
If the summing gain is 1, the output range is VAOUT = 3.66Vpp(typ@ VRDAH=3.3V). The bias voltage of external
summing circuit is supplied externally.
The input data format is 2’s complement. The output voltage is a positive full scale for 7FFFFFH(@24bit) and a negative
full scale for 800000H(@24bit). The ideal AOUT is 0V for 000000H(@24bit).
The internal switched-capacitor filter and external LPF attenuate the noise generated by the delta-sigma modulator
beyond the audio passband.
Differential outputs can eliminate few mV+AVDD/2 DC offset on analog outputs with capacitors.
Fig.3 shows the example of external op-amp circuit summing the differential outputs.
5) Connection to digital circuit
To minimize the noise resulting from the digital circuit, connect low voltage logic to the digital output. The
applicable logic family includes the 74LV, 74LV-A, 74ALVC and 74AVC series.
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2002/10