AK7744VT Datasheet, PDF (32/50 Pages) Asahi Kasei Microsystems – 24bit 3ch ADC + 24bit 4ch DAC with Audio DSP

[ASAHI KASEI]
[AK7744]
7-1-b) Program RAM writes (during reset phase)
Program RAM write operations are performed during the reset phase using 7-bytes of data. When all data have been
transferred, the RDY terminal is set to "L". Upon completion of writing into the PRAM, RDY returns “H” to allow
the next data bit input. When writing to sequential addresses, input the data without a command code or address. To
write discontinuous data, shift the RQ terminal from "H" to "L" again and then input the command code, address and
data in that order.
Data transfer procedure
c Command code C0h ( 1 1 0 0 0 0 0 0)
d Address upper
( 0 0 0 0 0 0 0 A8)
e Address lower
(A7 . . . . . . . A0)
f Data
(D31 . . . . . . D24)
g Data
(D23 . . . . . . D16)
h Data
(D15 . . . . . . D8)
i Data
(D7 . . . . . . D0)
S_RESET
RQ
SCLK
SI
RDY
SO
S_RESET
RQ
SCLK
SI
RDY
SO
11000000 0000000 A7 ****A1A0 _{D31***** D0 D31***** D0}
Input of continuous address data into PRAM
11000000 0000000A8 A7**A1A0 D31***D0
11000000 0000000A8 A7**A1A0
Input of discontinuous address data into PRAM
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2002/10