AK7744VT Datasheet, PDF (5/50 Pages) Asahi Kasei Microsystems – 24bit 3ch ADC + 24bit 4ch DAC with Audio DSP

[ASAHI KASEI]
[AK7744]
(2) Pin function
Pin No.
1
2
3
4
5
6
7
8
9
10
Pin name
AINR2
AINL2
AINR1
AINL1
A2IN-
A2IN+
A2IN1
AVDD
AVSS
TEST
11 _{INIT_RESET}
I/O
Function
I ADC1 single-ended analog Rch input pin No.2
I ADC1 single-ended analog Lch input pin No.2
I ADC1 single-ended analog Rch input pin No.1
I ADC1 single-ended analog Lch input pin No.1
I ADC2 analog inverted input pin.
I ADC2 analog non-inverted input pin.
I ADC2 single-ended analog input pin.
- Power supply pin for analog section 3.3V (typ)
- Analog ground 0V
- TEST pin
Reset pin ( for initialization )
I Used to input “L” initialize the AK7744 at power-on
Classification
Analog section
Analog
Power Supply
TEST pin
Reset
12
S_RESET
I System Reset pin.
13
DVSS
- Ground pin for digital section 0.0V
Digital
14
DVDD
- Power supply pin for digital section 3.3V(Typ).
Power Supply
Master clock input pin
System clock
15
XTI
I Connect a crystal oscillator between this pin and the XTO pin,
or input the external CMOS clock signal XTI pin.
Crystal oscillator output pin
16
XTO
O When a crystal oscillator is used, it should be connected between XTI and
XTO.
When the external clock is used, keep this pin open
Clock output pin
System clock
17
CLKO
O Outputs the XTI clock.
Allows the output to be set to "L" by control register setting.
18
JX
I External condition jump pin (Pulldown)
Condition input
Slave/master mode selector pin
Control
19
SMODE
I Set LRCLK and BITCLK to input or output mode.
SMODE="L": Slave mode (These are set to input mode.)
SMODE="H": Master mode (These are set to output mode.)
LR channel select Clock pin
System clock
20
LRCLK I/O SMODE="L": Slave mode: Inputs the fs clock.
SMODE="H": Master mode: Outputs the fs clock.
Serial bit clock pin
21
BITCLK I/O SMODE="L": Slave mode: Inputs 64 fs or 48 fs clocks.
SMODE="H": Master mode: Outputs 64 fs clocks.
<MS0167-E-00>
-5-
2002/10