AK7744VT Datasheet, PDF (31/50 Pages) Asahi Kasei Microsystems – 24bit 3ch ADC + 24bit 4ch DAC with Audio DSP

[ASAHI KASEI]
[AK7744]
7-1) Write during reset phase
7-1-a) Control register write (during reset phase)
The data comprises a set of 2 bytes used to perform control register write operations (during reset phase). When all
data has been entered, the new data is sent at the rising edge of the 16^th count of SCLK.
Data transfer procedure
c Command code 60h,64h,68h,6Ch
d Control data
(D7 D6 D5 D4 D3 D2 D1 D0)
For the function of each bit, see the description of Control registers, (section 2).
S_RESET
RQ
SCLK
SI
SO
60h
D7 ***D1 D0
64h
D7 ***D1 D0
Note) It must be set always 0 to D0.
Control Registers write operation
<MS0167-E-00>
- 31 -
2002/10