AK4137EQ Datasheet, PDF (53/65 Pages) Asahi Kasei Microsystems – 32bit SRC with PCM/DSD conversion

[AK4137]
SDA
SCL
S
start condition
P
stop condition
Figure 52. START and STOP Conditions
DATA
OUTPUT BY
TRANSMITTER
DATA
OUTPUT BY
RECEIVER
SCL FROM
MASTER
S
START
CONDITION
not acknowledge
1
2
acknowledge
8
9
Figure 53. Acknowledge on the I²C-Bus
clock pulse for
acknowledgement
SDA
SCL
data line
stable;
data valid
change
of data
allowed
Figure 54. Bit Transfer on the I²C-Bus
The pull-up resistance of SCL and SDA pins should be connected below the voltage of DVDD+0.3V.
Rev. 0.2
- 53 -
2014/06