AK4137EQ Datasheet, PDF (45/65 Pages) Asahi Kasei Microsystems – 32bit SRC with PCM/DSD conversion

[AK4137]
■ DSD Mode
DSD Input
The frequency of DCLK clock is variable between 64fs, 128fs and 256fs. The polarity of DCLK clock
can be inverted.
DCLK (64fs,128fs,256fs)
DCKB bit=”1”
DCLK (64fs,128fs,256fs)
DCKB bit=”0”
DSDL,DSDR
D0
D1
Normal
D2
D3
DSDL,DSDR
Phase Modulation ^D0
D1
D1
D2
D2
D3
Figure 38.
DSD Output
The frequency of DCLK is variable between 64fs, 128fs and 256fs.
Phase modulation mode is only available in Master mode.
Rev. 0.2
- 45 -
2014/06