AK4137EQ Datasheet, PDF (50/65 Pages) Asahi Kasei Microsystems – 32bit SRC with PCM/DSD conversion

[AK4137]
■ Serial Control Interface
The AK4137 becomes serial control mode by setting the PSN pin to “L”. The AK4137 supports 4-wire
serial Interface (I2S pin = “L”) and I2C bus (I2S pin = “H”) modes for internal register accessing.
4-wire Serial Control Mode (I2C pin = “L”)
The internal registers may be written by the 4-wire µP interface pins: CSN, CCLK and CDTI. The data
on this interface consists of Chip address (2bits, C1/0), Read/Write (Write= “1”, Read= “0”), Register
address (MSB first, 5bits) and Control data (MSB first, 8bits). Address and data are clocked in on the
rising edge of CCLK and data is clocked out on the falling edge. Data write becomes available by a
rising edge of CSN pin. For read operations, the CDTO output goes high impedance after a
low-to-high transition of CSN. The maximum speed of CCLK is 5MHz. Internal register values are
initialized by setting the PDN pin to “L”. The internal register timing circuit is reset by setting RSTN bit
to “0” in serial control mode. In this case, the register values are not initialized.
CSN
CCLK
CDTI
CDTO
C1 C0 R/W A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
Hi-z
Figure 44. Write Operation
CSN
CCL
KCDT _{C1 C0 R/W A4 A3 A2 A1 A0}
ICDTO
Hi-z
D7 D6 D5 D4 D3 D2 D1 D0
Figure 45. Read Operation
C1-C0:Chip Address (C1 bit =CAD1 pin, C0 bit =CAD0 pin)
R/W:READ/WRITE （Wirte=“1”,Read=”0”)
A4-A0:Register Address
D7-D0:Control Data
Rev. 0.2
- 50 -
2014/06