AK4137EQ Datasheet, PDF (20/65 Pages) Asahi Kasei Microsystems – 32bit SRC with PCM/DSD conversion

[AK4137]
Parameter
Symbol
Min.
Typ. Max. Unit
Audio Interface Timing
Output PORT (Slave mode)
OBICK Period Normal speed mode
tBCK 1/256 FSON
ns
Double speed mode
tBCK 1/128 FSOD
ns
Quad speed mode
tBCK 1/64 FSOQ
ns
Oct speed mode
tBCK 1/64 FSOO
ns
Hexa speed mode
tBCK 1/64 FSOH
ns
OBICK Pulse Width Low
tBCKL
7
ns
Pulse Width High
tBCKH
7
OLRCK Edge to OBICK “↑” (Note 15)
tLRB
5
OBICK “↑” to OLRCK Edge (Note 15)
tBLR
5
OLRCK to SDTO(MSB) (Except I²S mode)
tLRS
OBICK “↓” to SDTO
tBSD
ns
ns
ns
5
ns
5
ns
Output PORT (TDM256 slave mode)
OBICK Period
tBCK
81
ns
OBICK Pulse Width Low
tBCKL
32
ns
Pulse Width High
tBCKH
32
OLRCK Edge to OBICK “↑” (Note 15)
tLRB
20
OBICK “↑” to OLRCK Edge (Note 15)
tBLR
20
OBICK “↓” to SDTO
tBSD
ns
ns
ns
20 ns
Output PORT (TDM512 slave mode)
OBICK Period
tBCK
40
OBICK Pulse Width Low
tBCKL
16
Pulse Width High
tBCKH
16
OLRCK Edge to OBICK “↑” (Note 15)
tLRB
10
OBICK “↑” to OLRCK Edge (Note 15)
tBLR
10
OBICK “↓” to SDTO
tBSD
ns
ns
ns
ns
ns
10 ns
Output PORT (Master mode)
OBICK Frequency
OBICK Duty
OBICK “↓” to OLRCK Edge
OBICK “↓” to SDTO
fBCK
dBCK
tMBLR
tBSD
64 FSO
Hz
50
%
5
5
ns
5
5
ns
Reset Timing
PDN Pulse Width
(Note 16)
tPD
150
ns
PDN pin Pulse Width of Spike Noise
tPDS
0
Suppressed by Input Filter (Note 17)
50 ns
Note 15. BICK rising edge must not occur at the same time as LRCK edge.
Note 16. The AK4137 can be reset by bringing the PDN pin = “L”.
Note 17. “L” pulse width of spike noise suppressed by input filter of the PDN pin.
Note 18. When OMCLK=512FSO. If the OMCLK=256FSO, OMCLK clock is directly output from the
OBICK pin. When OMCLK = 384FSO, dBCK= (tCLKH)/(tCLKH+1/fCLK) x100 [%] or
(tCLKL)/(tCLKL+1/fCLK) x100 [%]. When OMCLK=768FSO, dBCK= (1/fCLK)/(3/fCLK) x100
[%].
Rev. 0.2
- 20 -
2014/06