AK4137EQ Datasheet, PDF (37/65 Pages) Asahi Kasei Microsystems – 32bit SRC with PCM/DSD conversion

[AK4137]
■ System Clock for Output PORT
The output ports work both in master and slave modes. The CM2-0 pins select the master/slave mode
and SRC bypass mode.
Mode
CM3
pin
CM2
pin
CM1
pin
CM0
pin
Master/Slave
OMCLK Input
(Note 24)
MCKO
Output
FSO
PCM
DSD
0
L
L
L
L
Master
256FSO
256FSO 8k192kHz
1
L
L
L
H
Master
384FSO
384FSO 8k96kHz
64fs
2
L
L
H
L
Master
512FSO
512FSO 8k96kHz
128fs
3
L
L
H
H
Master
768FSO
768FSO 8k48kHz
256fs
4
L
H
L
L
Slave
Not used. (Note 22) OMCLK 8k768kHz
5
LHLH
Master
128FSO (Note 25) 128FSO 8k384kHz 64fs,128fs
6
L H H L Slave (Bypass)
Not used. (Note 22)
-
-
-
7
L H H H Master (Bypass)
8
H
-
-
-
Master
64FSO
64FSO 8k768kHz
64fs
Note 22. Use for a clock input or connect to DVSS. In Mode 4, the MCKO pin outputs “L” if the
OMCLK/XTI pin is connected to DVSS. When a clock is input to the OMCLK/XTI pin, the
clock is input through and output from the MCKO pin. In Mode 6-7, OMCLK/XTI input is
ignored internally.
Table 2. Output PORT Master/Slave/ Bypass Mode Control ( PSN pin = “H”)
Rev. 0.2
- 37 -
2014/06