|
AK4642EN Datasheet, PDF (52/83 Pages) Asahi Kasei Microsystems – Stereo CODEC with MIC/HP/SPK-AMP | |||
|
◁ |
ASAHI KASEI
[AK4642EN]
 Serial Control Interface
(1) 3-wire Serial Control Mode (I2C pin = âLâ)
Internal registers may be written by using the 3-wire µP interface pins (CSN, CCLK and CDTI). The data on this interface
consists of a 2-bit Chip address (Fixed to â10â), Read/Write (Fixed to â1â), Register address (MSB first, 5bits) and
Control data (MSB first, 8bits). Each bit is clocked in on the rising edge (âââ) of CCLK. Address and data are latched on
the 16th CCLK rising edge (âââ) after CSN falling edge(âââ). Clock speed of CCLK is 5MHz (max). The value of
internal registers are initialized by PDN pin = âLâ.
CSN
CCLK
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
CDTI
C1 C0 R/W A4 A3 A2 A2 A0 D7 D6 D5 D4 D3 D2 D1 D0
â1â â0â â1â
C1-C0:
R/W:
A4-A0:
D7-D0:
Chip Address (C1 = â1â, C0 = â0â); Fixed to â10â
READ/WRITE (â1â: WRITE, â0â: READ); Fixed to â1â
Register Address
Control data
Figure 35. Serial Control I/F Timing
MS0420-E-00
- 52 -
2005/09
|
▷ |