AK4642EN Datasheet, PDF (30/83 Pages) Asahi Kasei Microsystems – Stereo CODEC with MIC/HP/SPK-AMP

ASAHI KASEI
[AK4642EN]
LRCK
0123
BICK(32fs)
SDTO(o)
15 14 13
9 10 11 12 13 14 15 0 1 2 3
7 6 5 4 3 2 1 0 15 14 13
SDTI(i)
15 14 13
0123
BICK(64fs)
SDTO(o)
15 14 13
7 6 5 4 3 2 1 0 15 14 13
15 16 17 18
31 0 1 2 3
10
15 14 13
SDTI(i)
15 14 13
1 0 Don't Care
15:MSB, 0:LSB
Lch Data
15 14 13
Figure 18. Mode 2 Timing
9 10 11 12 13 14 15 0 1
7 6 5 4 3 2 1 0 15
7 6 5 4 3 2 1 0 15
15 16 17 18
31 0 1
10
15
10
Don't Care 15
Rch Data
LRCK
0123
BICK(32fs)
SDTO(o)
0 15 14
9 10 11 12 13 14 15 0 1 2 3
8 7 6 5 4 3 2 1 0 15 14
SDTI(i)
0 15 14
0123
BICK(64fs)
SDTO(o)
15 14
8 7 6 5 4 3 2 1 0 15 14
15 16 17 18
31 0 1 2 3
210
15 14
SDTI(i)
15 14
210
15:MSB, 0:LSB
Lch Data
Don't Care
15 14
9 10 11 12 13 14 15 0 1
876543210
876543210
15 16 17 18
31 0 1
210
2 1 0 Don't Care
Rch Data
„ Mono/Stereo Mode
Figure 19. Mode 3 Timing
PMADL and PMADR bits set mono/stereo ADC operation.
PMADL bit
0
0
1
1
PMADR bit
ADC Lch data
ADC Rch data
0
All “0”
All “0”
1
Rch Input Signal Rch Input Signal
0
Lch Input Signal
Lch Input Signal
1
Lch Input Signal
Rch Input Signal
Table 14. Mono/Stereo ADC operation
Default
MS0420-E-00
- 30 -
2005/09