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AK4642EN Datasheet, PDF (45/83 Pages) Asahi Kasei Microsystems – Stereo CODEC with MIC/HP/SPK-AMP | |||
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ASAHI KASEI
[AK4642EN]
 Stereo Line Output (LOUT/ROUT pins)
When DACL bit is â1â, Lch/Rch signal of DAC is output from the LOUT/ROUT pins which is single-ended. When
DACL bit is â0â, output signal is muted and LOUT/ROUT pins output VCOM voltage. The load impedance is 10kâ¦
(min.). When the PMLO bit = LOPS bit = â0â, the stereo line output enters power-down mode and the output is
pulled-down to AVSS by 100kâ¦(typ). When the LOPS bit is â1â, stereo line output enters power-save mode. Pop noise at
power-up/down can be reduced by changing PMLO bit at LOPS bit = â1â. In this case, output signal line should be
pulled-down to AVSS by 20k⦠after AC coupled as Figure 29. Rise/Fall time is 300ms(max) at C=1µF. When PMLO bit
= LOPS bit = â1â, stereo line output is in normal operation.
LOVL bit set the gain of stereo line output.
DAC
âDACLâ
âLOVLâ
LOUT pin
ROUT pin
LOPS
0
1
Figure 28. Stereo Line Output
PMLO
Mode
LOUT/ROUT pin
0
Power-down
Pull-down to AVSS
1
Normal Operation
Normal Operation
0
Power-save
Fall down to AVSS
1
Power-save
Rise up to VCOM
Table 36. Stereo Line Output Mode Select (x: Donât care)
Default
LOVL
Gain
Output Voltage (typ)
0
0dB
0.6 x AVDD
Default
1
+2dB
0.757 x AVDD
Table 37. Stereo Line Output Volume Setting
LOUT 1µF
ROUT
220â¦
20kâ¦
Figure 29. External Circuit for Stereo Line Output (in case of using Pop Reduction Circuit)
MS0420-E-00
- 45 -
2005/09
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