LU3X34FTR Datasheet, PDF (7/52 Pages) Agere Systems – Quad 3 V 10/100 Ethernet Transceiver TX/FX

Preliminary Data Sheet
July 2000
LU3X34FTR
Quad 3 V 10/100 Ethernet Transceiver TX/FX
Pin Descriptions
Table 1. MII Interface Cross-Reference
Pin
Number
80
81
82
85
100
93
79
68
99
73
53
113
102
112
111
110
109
101
98
97
96
95
86
94
78
90
67
54
55
56
57
69
74
75
76
77
59
58
87
70
65
RMII Mode
FD10_0
FD10_1
FD10_2
FD10_3
FD100_0/COL_0
FD100_1/COL_1
FD100_2/COL_2
FD100_3/COL_3
TXEN_1
TXEN_2
TXEN_3
TXEN_0
RMII_RXER_0
RMII_TXD_0[0]
RMII_TXD_0[1]
RMII_RXD_0[0]
RMII_RXD_0[1]
CRS_DV_0
RMII_TXD_1[0]
RMII_TXD_1[1]
RMII_RXD_1[0]
RMII_RXD_1[1]
RMII_RXER_2
CRS_DV_1/PHYAD[2]
CRS_DV_2/PHYAD[3]
RMII_RXER_1
CRS_DV_3/PHYAD[4]
RMII_TXD_3[0]
RMII_TXD_3[1]
RMII_RXD_3[0]
RMII_RXD_3[1]
RMII_RXER_3
RMII_TXD_2[0]
RMII_TXD_2[1]
RMII_RXD_2[0]
RMII_RXD_2[1]
MDIO
MDC
RESERVED
RESERVED
RESERVED
SMII Mode
FD10_0
FD10_1
FD10_2
FD10_3
FD100_0
FD100_1
FD100_2
FD100_3
RESERVED
RESERVED
RESERVED
SMII_SYNC
RESERVED
SMII_TXD_0
RESERVED
SMII_RXD_0
RESERVED
SMII_EN
SMII_TXD_1
RESERVED
SMII_RXD_1
RESERVED
RESERVED
PHYAD[2]
PHYAD[3]
RESERVED
PHYAD[4]
SMII_TXD_3
RESERVED
SMII_RXD_3
RESERVED
RESERVED
SMII_TXD_2
RESERVED
SMII_RXD_2
RESERVED
MDIO
MDC
RESERVED
RESERVED
RESERVED
Lucent Technologies Inc.
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