English
Language : 

LU3X34FTR Datasheet, PDF (1/52 Pages) Agere Systems – Quad 3 V 10/100 Ethernet Transceiver TX/FX
Preliminary Data Sheet
July 2000
LU3X34FTR
Quad 3 V 10/100 Ethernet Transceiver TX/FX
Overview
The LU3X34FTR is a fully integrated, 4-port
10/100 Mbits/s physical layer device with an inte-
grated transceiver. This part was designed specifi-
cally for 10/100 Mbits/s switches. These applications
typically require stringent functionality in addition to
very tight board space, power, and cost require-
ments. The LU3X34FTR supports RMII and SMII
interfaces, offering the designer multiple reduced pin
count interfaces to save both real estate and cost in
system design. The LU3X34FTR was designed from
the beginning to conform fully with all pertinent spec-
ifications, from the ISO1/IEC2 11801 and EIA3/TIA
568 cabling guidelines to ANSI4 X3.263TP-PMD to
IEEE 5 802.3 Ethernet specifications.
Features
s 4-port, single-chip, integrated physical layer and
transceivers for 10Base-T, 100Base-TX, or
100Base-FX functions.
s IEEE 802.3 compatible 10Base-T and 100Base-T
physical layer interface and ANSI X3.263 TP-PMD
compatible transceiver.
s Interface support for RMII and SMII switch
applications.
s Autonegotiation pin configurability on a per-port
basis.
s FX mode configurable on a per-port basis.
s Built-in analog 10 Mbit receive filter, removing the
need for external filters.
s Built-in 10 bit transmit filter.
s 10 Mbit PLL, exceeding tolerances for both
preamble and data jitter.
s 100 Mbit PLL, combined with the digital adaptive
equalizer, robustly handles variations in rise-fall
time, excessive attenuation due to channel loss,
duty-cycle distortion, crosstalk, and baseline
wander.
s Transmit rise-fall time manipulated to provide lower
emissions, amplitude fully compatible for proper
interoperability.
s Programmable scrambler seed for better FCC
compliancy.
s IEEE 802.3u Clause 28 compliant autonegotiation
for full 10 Mbits/s and 100 Mbits/s control.
s Extended management support with interrupt
capabilities.
s PHY MIB support.
s Low-power 500 mA max.
— Low-cost 128-pin SQFP packaging with heat
spreader.
1. ISO is a registered trademark of The International Organization
of Standardization.
2. IEC is a registered trademark of The International Electrotechni-
cal Commission.
3. EIA is a registered trademark of Electronic Industries Associa-
tion.
4. ANSI is a registered trademark of American National Standards
Institute, Inc.
5. IEEE is a registered trademark of The Institute of Electrical and
Electronics Engineers, Inc.