LU3X34FTR Datasheet, PDF (47/52 Pages) Agere Systems – Quad 3 V 10/100 Ethernet Transceiver TX/FX

Preliminary Data Sheet
July 2000
Clock Timing (continued)
Table 40. SMII Timing
Symbol
t1
t2
t3
t4
Parameter
REF_CLK Period (±50 ppm)
Output Delay
Input Delay
Input Hold
LU3X34FTR
Quad 3 V 10/100 Ethernet Transceiver TX/FX
Min
Max
Unit
8
8
ns
2
5
ns
1.5
—
ns
1
—
ns
t2
t3
t4
t1
1
2
3
4
5
6
7
8
9
10
11
REF_CLK
SYNC
Rx
CRS
RXDV RXD0 RXD1 RXD2
RXD3 RXD4 RXD5 RXD6 RXD7
Tx
TXER
TXEN
TXD0
TXD1
TXD2
TXD3
TXD4
TXD5
TXD6
TXD7
Figure 17. SMII Timing
5-7508(F).ar1
Lucent Technologies Inc.
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