Z86L972 Datasheet, PDF (40/91 Pages) Zilog, Inc. – Low-Voltage Microcontrollers

Z86L972/Z86L973/Z86L974
Low-Voltage Microcontrollers
33
Load and Enable Count Bits
Setting the Load bit D₂ to 1 transfers the initial values in the prescaler and the
counter/timer registers into their respective down-counters. The next internal clock
resets bit D₂ to 0, readying the Load bit for the next load operation. The initial val-
ues can be loaded into the down-counters at any time. If the counter/timer is run-
ning, the counter/timer continues to run and starts the count over with the initial
value. Therefore, the Load bit actually functions as a software re-trigger.
The T₁ counter/timer remains at rest as long as the Enable Count bit D₃ is 0. To
enable counting, the Enable Count bit D₃ must be set to 1. Counting actually starts
when the Enable Count bit is written by an instruction. The first decrement occurs
four internal clock periods after the Enable Count bit has been set.
The Load and Enable Count bits can be set at the same time. For example, using
the instruction OR TMR #%0C sets both D₂ and D₃ of TMR to 1. The initial values of
PRE₁ and T₁ are loaded into their respective counters, and the count is started
after the M2T2 machine state after the operand is fetched as shown in Figure 20.
M₃
M₁
M₂
M_n
T₁ T₂ T₃ T₁ T₂ T₃ T₁ T₂ T₃ T₁ T₂ T₃
#03 is fetched
TMR is written;
counter/timers
are loaded
Figure 20. Starting the Count
first decrement
occurs four
clocks later
Prescaler Operations
During counting, the programmed clock source drives the prescaler 6-bit counter.
The counter is counted down from the value specified by bits D₂–D₇ of the corre-
sponding prescaler register, PRE₀ or PRE₁ (Figure 21). When the prescaler
counter reaches its end-of-count, the initial value is reloaded and counting contin-
ues. The prescaler never actually reaches zero. For example, if the prescaler is
set to divide by three, the count sequence is as follows:
3-2-1-3-2-1-3-2...
PS010504-1002
PRELIMINARY