Z86L972 Datasheet, PDF (29/91 Pages) Zilog, Inc. – Low-Voltage Microcontrollers

Z86L972/Z86L973/Z86L974
Low-Voltage Microcontrollers
22
or
Mnemonic Comment
NOP
; clear the pipeline
HALT
; enter HALT mode
Op Code
FFh
7Fh
HALT
HALT mode suspends instruction execution and turns off the internal CPU clock
(SCLK). The on-chip oscillator circuit remains active, so the internal Timer clock
(TCLK) continues to run and is applied to the counter/timers and interrupt logic.
An interrupt request, either internally or externally generated, must be executed
(enabled) to exit HALT mode. After the interrupt service routine, the program con-
tinues from the instruction immediately following the HALT.
The HALT mode can also be exited by a POR. In this case, the program execution
restarts at the reset address 000Ch.
STOP
STOP mode provides the lowest possible device standby current. This instruction
turns off both the internal CPU clock (SCLK) and internal Timer clock (TCLK) and
reduces the standby current to the minimum.
The STOP mode is terminated by a POR or SMR source. Terminating the STOP
mode causes the processor to restart the application program at address 000Ch.
Note: When the STOP instruction is executed, the microcontroller goes into the
STOP mode despite any state/change of the state of the port. The ports
need to be checked immediately before the NOP and STOP instructions to
ensure the right input logic before waiting for the change of the ports.
Stop Mode Recovery Sources
Exiting STOP mode using an SMR source is greatly simplified in the Z86L972/
Z86L973/Z86L974 family. The Z86L972/Z86L973/Z86L974 family of products
allows 16 individual I/O pins (Ports 2 and 5) to be used as stop-mode recovery
sources. The STOP mode is exited when one of these SMR sources is toggled. A
transition from either low to high or high to low on any pin of Port 2 or Port 5 if the
pin is identified as an SMR source will effect an SMR.
There are three registers that control STOP mode recovery:
• Stop Mode Recovery
• Port 2 Stop Mode Recovery (P2SMR)
• Port 5 Stop Mode Recovery (P5SMR)
PS010504-1002
PRELIMINARY