Z86L972 Datasheet, PDF (17/91 Pages) Zilog, Inc. – Low-Voltage Microcontrollers

Z86L972/Z86L973/Z86L974
Low-Voltage Microcontrollers
10
Memory (ROM and RAM)
There are four basic address spaces available to support a wide range of configu-
rations:
• Program memory (on-chip)
• Standard register file
• Expanded register file
• Executable RAM
The Z8 standard register file totals up to 256 consecutive bytes organized as 16
groups of 16 eight-bit registers. These registers consist of I/O port registers,
general-purpose RAM registers, and control and status registers. Every RAM reg-
ister acts like an accumulator, speeding instruction execution and maximizing cod-
ing efficiency. Working register groups allow fast context switching.
The standard register file of the Z8 (known as Bank 0) has been expanded to form
16 expanded register file (ERF) banks. The expanded register file allows for addi-
tional system control registers and for the mapping of additional peripheral
devices into the register area. Each ERF bank can potentially consist of up to 256
registers (the same amount as in the standard register file) that can then be
divided into 16 working register groups. Currently, only Group 0 of ERF Banks F
and D (0Fh and 0Dh) has been implemented.
In addition to the standard program memory and the RAM register files, the
Z86L972/Z86L973/Z86L974 family also has 256 bytes of executable RAM that
has been mapped into the upper 256 bytes of the program memory address
space (FF00h–FFFFh). Data can be written to the executable RAM by using the
LDC instruction.
Program Memory Structure
The first 12 bytes of program memory are reserved for the interrupt vectors.
These locations contain six 16-bit vectors that correspond to the six available
interrupts (IRQ₀ through IRQ₅.) Address 12 (0Ch) up consists of on-chip read-only
memory (ROM).
After any reset operation (power-on reset, watch-dog timer time out, and stop
mode recovery), program execution resumes with the initial instruction fetch from
location 000Ch. After a reset, the first routine executed must be one that initializes
the control registers to the required system configuration.
A unique feature of the Z86L972/Z86L973/Z86L974 family is the presence of 256
bytes of on-chip executable RAM. This random-access memory is in addition to
the standard Z8 register file memory available on all Z8 microcontrollers. As illus-
trated in Figure 4, the executable RAM is mapped into the upper 256 bytes of the
PS010504-1002
PRELIMINARY