W948D6FBHX5E-TR Datasheet, PDF (51/60 Pages) Winbond – 256Mb Mobile LPDDR

W948D6FB / W948D2FB
8.5 AC Timings
[Recommended Operating Conditions: Notes 1-9]
PARAMETER
SYMBOL
-5
MIN
MAX
DQ output access time
from CK/ CK
CL=3
tAC
CL=2
2.0
5.0
2.0
6.5
DQS output access time from CCKL/=3
2.0
5.0
CK
tDQSCK
CL=2
2.0
6.5
Clock high-level width
tCH
0.45
0.55
Clock low-level width
tCL
0.45
0.55
Clock half period
Clock cycle time
tHP
CL=3
tCK
CL=2
Min
(tCL, tCH)
5
12
DQ and DM input setup
fast
tDS
time
slow
0.48
0.58
fast
DQ and DM input hold time
slow
tDH
0.48
0.58
DQ and DM input pulse width
tDIPW
1.6
Address and control input ^fast
tIS
0.9
setup time
slow
1.1
Address and control input ^fast
tIH
0.9
hold time
slow
1.1
Address and control input pulse width tIPW
2.3
DQ & DQS low-impedance time from
CK/ CK
tLZ
1.0
DQ & DQS high-impedance ^CL=3
time from CK/ CK
CL=2
tHZ
5.0
6.5
DQS-DQ skew
tDQSQ
0.4
DQ/DQS output hold time from DQS
tQH
tHP-tQHS
Data hold skew factor
tQHS
0.5
Write command to 1st DQS latching
transition
tDQSS
0.75
1.25
DQS input high-level width
tDQSH
0.4
0.6
DQS input low-level width
tDQSL
0.4
0.6
DQS falling edge to CK setup time
tDSS
0.2
DQS falling edge hold time from CK
tDSH
0.2
MODE REGISTER SET command
tMRD
2
period
256Mb Mobile LPDDR
-6
MIN
MAX
2.0
5.0
2.0
6.5
2.0
5.0
2.0
6.5
0.45
0.55
0.45
0.55
Min
(tCL, tCH)
6
12
0.6
0.7
0.6
0.7
1.6
1.1
1.3
1.1
1.3
2.6
1.0
tHP-tQHS
5.0
6.5
0.5
0.65
0.75
1.25
0.4
0.6
0.4
0.6
0.2
0.2
2
- 75
MIN
MAX
2.0
6.0
2.0
6.5
2.0
6.0
2.0
6.5
0.45
0.55
0.45
0.55
Min
(tCL, tCH)
7.5
12
0.8
0.9
0.8
0.9
1.8
1.3
1.5
1.3
1.5
2.6
1.0
tHP-tQHS
6.0
6.5
0.6
0.75
0.75
1.25
0.4
0.6
0.4
0.6
0.2
0.2
2
UNIT NOTES
ns
ns
tCK
tCK
ns
10,11
ns
12
ns
12
ns 13,14,15
ns 13,14,16
ns 13,14,15
ns 13,14,16
ns
17
ns
15,18
ns
16,18
ns
15,18
ns
16,18
ns
17
ns
19
ns
19
ns
20
ns
11
ns
11
tCK
tCK
tCK
tCK
tCK
tCK
- 51 -
Publication Release Date : Oct, 15, 2012
Revision : A01-004