W948D6FBHX5E-TR Datasheet, PDF (35/60 Pages) Winbond – 256Mb Mobile LPDDR

W948D6FB / W948D2FB
256Mb Mobile LPDDR
7.6.3 Write Burst (min. and max. tDQSS)
During Write bursts, the first valid data-in element will be registered on the first rising edge of DQS following the
WRITE command, and the subsequent data elements will be registered on successive edges of DQS. The Low state
of DQS between the WRITE command and the first rising edge is called the write preamble, and the Low state on
DQS following the last data-in element is called the write post-amble.
The time between the WRITE command and the first corresponding rising edge of DQS (tDQSS) is specified with a
relatively wide range - from 75% to 125% of a clock cycle. Following figure shows the two extremes of tDQSS for a
burst of 4, upon completion of a burst, assuming no other commands have been initiated, the DQs will remain high-Z
and any additional input data will be ignored.
CK
CK
Command
Address
DQS
DQ
WRITE
NOP
BA,Col b
tDQSSmin
NOP
NOP
NOP
NOP
DM
DQS
DQ
tDQSSmax
DM
1) DI b = Data In to column b.
2) 3 subsequent elements of Data In are applied i nthe programmed order following DI b.
3) A non-interrupted burst of 4 is shown.
4) A10 is LOW with the WRITE command (Auto Precharge is disabled)
= Don't Care
7.6.4 Write to Write
Data for any WRITE burst may be concatenated with or truncated with a subsequent WRITE command. In either
case, a continuous flow of input data, can be maintained. The new WRITE command can be issued on any positive
edge of the clock following the previous WRITE command.
The first data-in element from the new burst is applied after either the last element of a completed burst or the last
desired data element of a longer burst which is being truncated. The new WRITE command should be issued X
cycles after the first WRITE command, where X equals the number of desired data-in element pairs.
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Publication Release Date : Oct, 15, 2012
Revision : A01-004