W28V400B Datasheet, PDF (28/48 Pages) Winbond – 4M(512K x 8/256K x 16) SMARTVOLTAGE FLASH MEMORY

W28V400B/T
DC Characteristics (Continued)
PARAMETER
Input Low Voltage (Note 7)
Input High Voltage (Note 7)
Output Low Voltage (Note 3, 7)
Output High Voltage
(TTL) (Note 3, 7)
SYM.
TEST CONDITIONS
V_IL
V_IH
V_OL
V_OH1
V_DD = V_DD Min.
I_OL = 5.8 mA (5V ±0.5V)
I_OL = 2.0 mA (3.3V ±0.3V)
I_OL = 2.0 mA (2.7V − 3.6V)
V_DD = V_DD Min.
I_OH = -2.5 mA (5V ±0.5V)
I_OH = -2.0 mA (3.3V ±0.3V)
I_OH = -1.5 mA (2.7V − 3.6V)
V_DD = 2.7V - 3.6V
Min.
Max.
V_DD = 5V ±0.5V
Min. Max.
UNIT
-0.5
0.8
-0.5
0.8
V
2.0 V_DD +0.5 2.0 V_DD +0.5 V
0.4
0.45
V
2.4
2.4
V
Output High Voltage
(CMOS) (Note 3, 7)
V_OH2
V_DD = V_DD Min.
I_OH = -2.0 mA
0.85 V_DD
0.85 V_DD
V
V_DD -0.4
V_DD -0.4
V
V_PP Lockout during Normal Operations
(Note 4, 7)
V_PPLK
V_PP during Block Erase or Word/Byte
Write Operations
V_PPH1
V_DD = V_DD Min.
I_OH = -100 µA
1.5
1.5
V
2.7
3.6
-
-
V
V_PP during Block Erase or Word/Byte
Write Operations
V_PPH2
4.5
5.5
4.5
5.5
V
V_PP during Block Erase or Word/Byte
Write Operations
V_PPH3
11.4
12.6 11.4 12.6
V
V_DD Lockout Voltage
#RESET Unlock Voltage (Note 8, 9)
V_LKO
V_HH Unavailable #WP
2.0
2.0
V
11.4
12.6 11.4 12.6
V
Notes:
1. All currents are in RMS unless otherwise noted. Typical values at nominal V_DD voltage and TA = +25° C.
2. I_CCWS and I_CCES are specified with the device de-selected. If read or word/byte written while in erase suspend mode, the
device’s current draw is the sum of I_CCWS or I_CCES and I_CCR or I_CCW, respectively.
3. Includes RY/#BY.
4. Block erases and word/byte writes are inhibited when V_PP ≤ V_PPLK, and not guaranteed in the range between V_PPLK (max.) and
V_PPH1 (min.), between V_PPH1 (max.) and V_PPH2 (min.), between V_PPH2 (max.) and V_PPH3 (min.), and above V_PPH3 (max.).
5. Automatic Power Savings (APS) reduces typical I_CCR to 1mA at 5V V_DD and 3 mA at 2.7V and 3.3V V_DD in static operation.
6. CMOS inputs are either V_DD ±0.2V or V_SS ±0.2V. TTL inputs are either V_IL or V_IH.
7. Sampled, not 100% tested.
8. Boot block erases and word/byte writes are inhibited when the corresponding #RESET = V_IH and #WP = V_IL. Block erase and
word/byte write operations are not guaranteed with V_IH < #RESET < V_HH and should not be attempted.
9. #RESET connection to a V_HH supply is allowed for a maximum cumulative period of 80 hours.
10. #BYTE input level is V_DD ±0.2V in word mode or V_SS ±0.2V in byte mode. #WP input level is V_DD ±0.2V or V_SS ±0.2V.
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