TX4939 Datasheet, PDF (642/756 Pages) Toshiba Semiconductor – 64-Bit TX System RISC

Toshiba RISC Processor
I2S
TX4939
23.4.3. I2S Channel Control Register (I2SCCR)
0xFA04
Bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R/W/RO R/W RO RO RO R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Reset Value 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 1
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
23
R/W/RO RO RO RO RO R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Reset Value 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 1
Bit
D31
D30:28
D27
D26
D25
D24
D23
D22
D21
D20
D19
D18:17
Field Name
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Description
I2S mode option
0: 2 channel i/o mode (default)
1: 3 channel output mode
Reserved.
WS Check Enable (Channel 1 i/o mode)
0: Disable (default)
1: Enable
When 3 Channel Mode is enable, this bit is not used
MCLK Check Enable (Channel 1 i/o mode)
0: Disable
1: Enable
When 3 Channel Mode is enable, this bit is not used
Clock Data Option (Channel 1 i/o mode)
0: Falling edge (default)
1: Rising edge
When 3 Channel Mode is enable, this bit is not used
Notes:
Falling edge selected: WS is toggle at the falling edge of SCK
Rising edge selected: WS is toggle at the rising edge of SCK
Output mode:
Falling edge selected: clock SD at falling edge
Rising edge selected: clock SD at rising edge
Input mode:
Falling edge selected: sample SD at rising edge
Rising edge selected: sample SD at falling edge
Data Channel Swap Option (Channel 1 i/o mode)
0: Normal (default)
1: Swap (MSB <--> LSB)
When 3 Channel Mode is enable, this bit is not used
MCLK Mode Option (Channel 1 i/o mode)
0: Slave mode. Receive MCLK1
1: Master mode. Drive MCLK1 (Default)
When 3 Channel Mode is enable, this bit is not used
Receiver-Master Mode Option (Channel 1 i/o mode)
0: Slave mode. Receive SCK, WS
1: Master mode. Drive SCK, WS (Default)
When 3 Channel Mode is enable, this bit is not used
Clock Delay Option (Channel 1 i/o mode)
0: Latch data on the first clock (default)
1: Latch data on the second clock
For Left-Justify mode only
When 3 Channel Mode is enable, this bit is not used
Invert WS Option (Channel 1 i/o mode)
0: As normal (default)
1: Invert WS
Invert WS right at the IO pad.
When 3 Channel Mode is enable, this bit is not used
Left/Right Justify Select Option (Channel 1 i/o mode)
0: Left-Justify (default)
1: Right-Justify
When 3 Channel Mode is enable, this bit is not used
Data Select Option (Channel 1 i/o mode)
00: 16 bits data (default)
01: 18 bits data
10: 20 bits data
11: 24 bits data
When 3 Channel Mode is enable, these bits are not used
Rev. 3.3 May 18, 2007
23-12