TX4939 Datasheet, PDF (532/756 Pages) Toshiba Semiconductor – 64-Bit TX System RISC

EMAC
Toshiba RISC Processor
TX4939
18.3.9.5. Receiving frames
For the MAC to receive a frame, the system software has to perform the following operations.
‹ As described in 18.3.9.3 Initializing the queues, initialize a free buffer list or free descriptor area.
‹ Write a dummy frame descriptor in a free descriptor area. Set the COwnsFD bit of the FDCtl field so the
Ethernet Controller becomes the owner.
‹ Initialize the Reception Frame Pointer Register to the address of the dummy frame descriptor in the free
descriptor area.
There are two ways for the system software to get notification of a reception frame:
‹ Request an interrupt for each reception frame.
‹ Poll the dummy frame descriptor and check whether the COwnsFD bit is set.
You can enable interrupts by setting the Reception Complete Interrupt Enable bit of the Reception Control Register.
The system must perform the following processes after it receives a frame.
‹ Process the frame descriptor, and then release it for reuse.
‹ Release the buffer returned from the above protocol layer and add it to the free buffer list.
18.3.9.5.1. Processing reception frame descriptors
Free descriptor areas are used by FIFOs. However, the frame processing and time required for returning the
corresponding buffer differ depending on the application. Then, the frame descriptor mapped by the Ethernet Controller
copies that content to a different area, the frame descriptor of the free descriptor area is released in the order received,
and the copied descriptor contents are handed to the upper layer of the protocol stack.
18.3.9.5.2. Releasing buffers
There are two methods of mapping a buffer:
‹ Start a new frame in a new buffer (Single Frame mode).
‹ Place several frames or parts of a frame in one buffer (Packed Buffer mode).
The Control field of the Buffer Fragment Size Register or Frame Descriptor controls the method of mapping the buffer.
The Single Frame mode has the advantage of allowing easy memory management, but has the disadvantage of
decreasing the memory usage efficiency. Conversely, the Packed Buffer mode has the advantage when considering
memory usage efficiency, but has the disadvantage since memory management becomes complex.
When in the Packed Buffer mode, multiple frames or parts of frames may be placed in the same buffer area, so you must
keep several points in mind when managing the memory. The Ethernet Controller counts the number of buffers created in
18
the same buffer area then provides that value as the RxBDSeqN value of the BDCtl field in the buffer descriptor. Then,
the system software counts the returned fragments, confirms that all fragments were returned, then releases them.
The buffer ID value (RxBDID) is copied from the buffer descriptor of the free buffer list queue to the buffer descriptor in
the reception frame queue. You can use up to 256 buffer IDs. When you require more buffer IDs than that, there are
several techniques you can use. For example, you can specify the buffer ID expansion bit in the FDSystem field. You can
also use the upper bit of the buffer pointer.
18.3.9.6. Handling interrupts
Interrupts generally use one common interrupt line. To confirm whether this PCI device is the interrupt source, use the
system software to read the Interrupt Factor Register. Depending on the content of the Interrupt Factor Register, you may
have to read other registers such as the Transmission Status Register or Reception Status Register.
Rev. 3.3 May 18, 2007
18-34