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MSP430FR5994_17 Datasheet, PDF (97/168 Pages) Texas Instruments – Mixed-Signal Microcontrollers
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MSP430FR5994, MSP430FR59941, MSP430FR5992, MSP430FR5964, MSP430FR5962
SLASE54A – MARCH 2016 – REVISED OCTOBER 2016
Table 6-27. Port P3 (P3.0 to P3.3) Pin Functions
PIN NAME (P3.x)
x
FUNCTION
CONTROL BITS AND SIGNALS(1)
P3DIR.x
P3SEL1.x
P3SEL0.x
P3.0 (I/O)
I: 0; O: 1
0
0
P3.0/A12/C12
N/A
Internally tied to DVSS
0
N/A
Internally tied to DVSS
A12/C12 (2) (3)
0
0
1
1
0
1
0
1
X
1
1
P3.1 (I/O)
I: 0; O: 1
0
0
P3.1/A13/C13
N/A
Internally tied to DVSS
1
N/A
Internally tied to DVSS
A13/C13 (2) (3)
0
0
1
1
0
1
0
1
X
1
1
P3.2 (I/O)
I: 0; O: 1
0
0
P3.2/A14/C14
N/A
Internally tied to DVSS
2
N/A
Internally tied to DVSS
A14/C14 (2) (3)
0
0
1
1
0
1
0
1
X
1
1
P3.3 (I/O)
I: 0; O: 1
0
0
P3.3/A15/C15
N/A
Internally tied to DVSS
3
N/A
Internally tied to DVSS
A15/C15 (2) (3)
0
0
1
1
0
1
0
1
X
1
1
(1) X = Don't care
(2) Setting P3SEL1.x and P3SEL0.x disables the output driver and the input Schmitt trigger to prevent parasitic cross currents when
applying analog signals.
(3) Setting the CEPDx bit of the comparator disables the output driver and the input Schmitt trigger to prevent parasitic cross currents when
applying analog signals. Selecting the Cx input pin to the comparator multiplexer with the input select bits in the comparator module
automatically disables output driver and input buffer for that pin, regardless of the state of the associated CEPDx bit.
Copyright © 2016, Texas Instruments Incorporated
Detailed Description
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