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MSP430FR5994_17 Datasheet, PDF (36/168 Pages) Texas Instruments – Mixed-Signal Microcontrollers
MSP430FR5994, MSP430FR59941, MSP430FR5992, MSP430FR5964, MSP430FR5962
SLASE54A – MARCH 2016 – REVISED OCTOBER 2016
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5.11.2 Reset Timing
Table 5-3 lists the input requirements of the reset pin.
Table 5-3. Reset Input
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
t(RST) External reset pulse duration on RST(1)
VCC
MIN
2.2 V, 3.0 V
2
(1) Not applicable if RST/NMI pin configured as NMI.
MAX UNIT
µs
5.11.3 Clock Specifications
LFXTCLK (see Table 5-4) is a low-frequency oscillator that can be used either with low-frequency 32768-
Hz watch crystals, standard crystals, resonators, or external clock sources in the 50 kHz or below range.
When in bypass mode, LFXTCLK can be driven with an external square-wave signal.
Table 5-4. Low-Frequency Crystal Oscillator, LFXT(1)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
IVCC.LFXT
fLFXT
DCLFXT
fLFXT,SW
PARAMETER
TEST CONDITIONS
Current consumption
LFXT oscillator crystal frequency
fOSC = 32768 Hz
LFXTBYPASS = 0, LFXTDRIVE = {0},
TA = 25°C, CL,eff = 3.7 pF, ESR ≈ 44 kΩ
fOSC = 32768 Hz
LFXTBYPASS = 0, LFXTDRIVE = {1},
TA = 25°C, CL,eff = 6 pF, ESR ≈ 40 kΩ
fOSC = 32768 Hz
LFXTBYPASS = 0, LFXTDRIVE = {2},
TA = 25°C, CL,eff = 9 pF, ESR ≈ 40 kΩ
fOSC = 32768 Hz
LFXTBYPASS = 0, LFXTDRIVE = {3},
TA = 25°C, CL,eff = 12.5 pF, ESR ≈ 40 kΩ
LFXTBYPASS = 0
LFXT oscillator duty cycle
LFXT oscillator logic-level
square-wave input frequency
Measured at ACLK,
fLFXT = 32768 Hz
LFXTBYPASS = 1(2) (3)
VCC
3.0 V
MIN TYP
180
185
225
330
32768
30%
10.5 32.768
DCLFXT, SW
LFXT oscillator logic-level
square-wave input duty cycle
LFXTBYPASS = 1
30%
OALFXT
Oscillation allowance for
LF crystals(4)
LFXTBYPASS = 0, LFXTDRIVE = {1},
fLFXT = 32768 Hz, CL,eff = 6 pF
LFXTBYPASS = 0, LFXTDRIVE = {3},
fLFXT = 32768 Hz, CL,eff = 12.5 pF
210
300
MAX UNIT
nA
Hz
70%
50 kHz
70%
kΩ
(1) To improve EMI on the LFXT oscillator, the following guidelines should be observed.
• Keep the trace between the device and the crystal as short as possible.
• Design a good ground plane around the oscillator pins.
• Prevent crosstalk from other clock or data lines into oscillator pins LFXIN and LFXOUT.
• Avoid running PCB traces underneath or adjacent to the LFXIN and LFXOUT pins.
• Use assembly materials and processes that avoid any parasitic load on the oscillator LFXIN and LFXOUT pins.
• If conformal coating is used, make sure that it does not induce capacitive or resistive leakage between the oscillator pins.
(2) When LFXTBYPASS is set, LFXT circuits are automatically powered down. Input signal is a digital square wave with parametrics
defined in the Schmitt-trigger Inputs section of this data sheet. Duty cycle requirements are defined by DCLFXT, SW.
(3) Maximum frequency of operation of the entire device cannot be exceeded.
(4) Oscillation allowance is based on a safety factor of 5 for recommended crystals. The oscillation allowance is a function of the
LFXTDRIVE settings and the effective load. In general, comparable oscillator allowance can be achieved based on the following
guidelines, but should be evaluated based on the actual crystal selected for the application:
• For LFXTDRIVE = {0}, CL,eff = 3.7 pF
• For LFXTDRIVE = {1}, CL,eff = 6 pF
• For LFXTDRIVE = {2}, 6 pF ≤ CL,eff ≤ 9 pF
• For LFXTDRIVE = {3}, 9 pF ≤ CL,eff ≤ 12.5 pF
36
Specifications
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